1st Asia-Pacific Workshop on Networking (APNet 2017)

August 3-4 2017, Hong Kong, China

Networking System Implementation (NSI) Talks

Implementing ClickNP: Highly Flexible and High-Performance Network Processing with FPGA+CPU

Abstract: ClickNP is a highly flexible and high-performance network processing platform with reconfigurable hardware, published in SIGCOMM'16. This talk will share our implementation experience of the ClickNP system, both before and after paper submission. Throughout 8 months, we developed 100 elements and 5 network functions for the SIGCOMM paper, resulting in 1K commits and 20K lines of code. After the paper submission, ClickNP continues to develop and extends to a general-purpose FPGA programming framework in our research team, resulting in 300 elements, 86 application projects and 80K lines of code.
(1) Although with high-level languages, programming FPGA is still much more challenging than CPU. We had hard times to understand the behavior and pitfalls of black-box compilers, and shared our findings by enforcing coding style in the ClickNP language design and providing optimizations in the ClickNP compiler.
(2) OpenCL host to kernel communication model is a poor fit for network processing. This talk will elaborate internals of the high performance communication channel between CPU and FPGA.
(3) FPGA compilation takes hours, run-time debugging is hard, and simulation is inaccurate. For case study, we show how we identified and resolved a deadlock bug in the L4 load balancer, leveraging ClickNP debugging functionalities.

Speaker Bio: TBA

Experiences in Intel SGX Research

Abstract: Network applications and protocols are increasingly adopting security and privacy features, as they are becoming one of the primary requirements. Motivated by the recent movement towards commoditization of trusted execution environments (TEEs), our research explores alternative design choices that application and protocol designers should consider. In particular, we explore the possibility of using Intel SGX to provide security and privacy in a wide range of network applications. We show that leveraging hardware protection of TEEs opens up new possibilities, often at the benefit of a much simplified application/protocol design. We demonstrate its practical implications by exploring the design space for SGX-enabled software-defined inter-domain routing, peer-to-peer anonymity networks (Tor), and middleboxes. Finally, we share our experience in implementing an open-source Intel SGX emulator and prototyping applications that run on SGX platforms.

Speaker Bio: Seongmin Kim is currently studying at KAIST as a Ph.D. candidate from 2015 with Professor Dongsu Han specializing in network systems and security. His research interests are resource management and information security, in particular, system security (especially trusted computing) and network security.

Developing middelboxes with the mOS API

Abstract: mOS is a specialized networking stack and an API for flow monitoring middleboxes. In this talk, we will briefly describe the basic design and implementation of the mOS stack and its API, and show how it simplifies the development of complex, flow-tracking middleboxes. We will also show a few real-world examples of middleboxes developed with the mOS API, and demonstrate the effectiveness in terms of code reduction and high performance. This is a joint talk with KyoungSoo Park and YoungGyoun Moon. KyoungSoo will explain the basic concept, and YoungGyoun will show a demo with a few mOS-based middleboxes.

Speaker Bio: KyoungSoo Park is an associate professor in the school of Electrical Engineering at KAIST. He received his B.S. degree from Seoul National University in 1997, and his M.A. and Ph.D. degrees from Princeton University in 2004 and 2007, respectively, all in computer science. His research interest is focused on the reliability, performance, and security issues in the design and implementation of networked computing systems. He has developed CoBlitz, a scalable large-file content distribution network (CDN), which is acquired by Verivue, Inc., and subsequently by Akamai, Inc. in 2012. He has co-developed HashCache, a memory-efficient caching storage system for developing regions, which was chosen as one of the top 10 technologies in 2009 by the MIT technology review magazine. More recently, he is working on high-performance packet/flow processing systems using multicore/manycore processors, such as PacketShader (a 40Gbps software router), SSLShader (13Gbps SSL proxy), Kargus (33 Gbps software NIDS), and APUNet (a high-performance packet processing system on APU). He and his students won the community award at NSDI 2014 (mTCP), and the best paper award at NSDI 2017 (mOS).

Experiments with Data Center Congestion Control Research

Abstract: Data center congestion control is a hot research topic in recent years. To minimize flow completion times in commodity data centers, we propose PIAS, a practical information-agnostic flow scheduling solution. In this talk, we want to share our experience on PIAS project. We will first briefly describe mechanisms of PIAS. Then we will introduce implementation efforts for paper submission, from switch configuration to kernel module development. After that, we will talk about implementation and research efforts after paper acceptance. Finally, we summarize our takeaway from PIAS project.

Speaker Bio: Wei Bai is an associate researcher 2 at Microsoft Research Asia. He received his Ph.D. from Hong Kong University of Science and Technology in 2017. He was also a recipient of Microsoft Research Asia Fellowship in 2015. Before that, he received his B.E. from Shanghai Jiao Tong University in 2013. He is working on data center networking now.