Full-day Tutorial: P4: Programming the Network Data Plane

Friday, August 26th

Location

The tutorial will take place at Room Topazio.

Presenters

Changhoon Kim

Barefoot Networks, USA
Jeongkeun "JK" Lee

Barefoot Networks, USA

Tutorial Timetable

09:00 — 09:15

Welcome and Intro
09:15 — 10:30

Lecture, part I
10:30 — 11:00

Coffee-break
11:00 — 12:30

Lecture and Demo, part II
12:30 — 14:00

Lunch break
14:00 — 15:30

Hands-on Lab
15:30 — 16:00

Coffee-break
16:00 — 17:30
Mini-workshop
- Talks & Panel
- Participants: Nate Foster, Anirudh Sivaraman,
  Robert Soule, Marco Canini, and Sean Choi

Motivations

P4 (www.p4.org) was created as a common language to describe how packets should be processed by all manner of programmable packet-processing targets, from general-purpose CPUs, NPUs, FPGAs, and to high-performance programmable ASICs [1]. P4 was designed with three goals:

Protocol independence: Network devices should not be tied to any specific network protocols.
Target independence: Programmers should be able to describe packet-processing functionality independently of the specifics of the underlying hardware.
Re-configurability in the field: Programmers should be able to change the way switches process packets once they are deployed.

The P4 community has created — and continues to maintain and develop — a language specification, a set of open-source tools (compilers, debuggers, code analyzers, libraries, software P4 switches, etc.), and sample P4 programs with the goal of making it easy for P4 users to quickly and correctly author new data plane behaviors. New ideas are already being authored in P4, prototyped as new forwarding behaviors, and published at top networking conferences. Existing data plane features typically realized in a hard-wired logic are also being authored in P4.

We offered the first P4 tutorial last year at SIGCOMM (http://conferences.sigcomm.org/sigcomm/2015/tutorial-p4.php), and more than 50 attendees actively participated in the full-day program — lectures, hands-on labs, and panel discussions. Following up on the successful reception of the previous event, we would like to give another full-day tutorial at SIGCOMM'16.

There are a few reasons that we believe this second tutorial will be useful. First, like any other real languages, P4 has been gradually evolving. The language spec has been updated since last tutorial, incorporating constructs to embrace functional and architectural heterogeneity of various targets while keeping the language core simple and clean. The new spec also offers features to improve portability and composability of a P4 program, allowing P4 consumers and target providers to reuse their code. Second, the P4 development environment has also been evolving. The P4 community now has a more powerful compiler, along with an architecture-independent software P4 switch. Third, there are now several P4-programmable targets, including programmable NICs, high-end switching chips, and even software switches such as OVS [2] and eBPF [3]. Finally, P4 has become an increasingly popular choice for developing novel data plane designs. Examples include P4 programs that realize in-band network telemetry [4], L4 connection load-balancing, path-condition-aware adaptive routing [5], a better NetFlow [6], and even Paxos [7].

Hence, we intend to cover these updates in this second tutorial. The main goal of the tutorial is to enable attendees to use P4 in their research, to prototype their ideas and run them in programmable switches. We also aim to encourage researchers and developers to contribute to the P4 language, and develop new tools (e.g. compilers, debuggers, formal verification tools). Via a hands-on tutorial, we will teach attendees how to write functioning P4 programs to implement existing and new protocols, and to add new functionality in the forwarding plane. By the end of the tutorial attendees will be able to implement novel data plane features in P4, and evaluate their programs in a Mininet emulation framework.

Outline of the Tutorial

A full-day event comprised of the followings:

Lecture on P4 (2hr)
Demonstration of existing and new networking features developed in P4 (1hr)
Hands-on training of P4 development environment (compiler, debugger, behavioral model, h/w targets, etc.) (2.5hr)
Mini-workshop (1.5hr)

Exchanging P4-programming experiences for research & teaching projects
Panel discussing research topics regarding novel data plane protocols, programming models, and development environment

Expected Audience and Prerequisites

The tutorial will be useful to researchers, students, and practitioners alike (engineers, network admins, network architects, and developers).

Attendees must bring their own laptops. We will provide a VM image containing all the necessary packages and tools.

The P4 spec is publicly available at www.p4.org under an Apache license. Key development tools (front-end compiler and s/w switch capable of running P4 programs) is available as open-source tools, available at http://github.com/p4lang.

We have already given or will have given a shorter or longer version of this tutorial at various venues, including the P4 workshop, P4 Bootcamp, ONS Webniar, etc. Hence, the organizers are experienced in the contents and materials.

Speakers

Lecturers: Changhoon Kim and Jeongkeun "JK" Lee.

Hands-on trainers: one or two more PhD students from Stanford.

Panelists for the mini workshop: We are currently contacting people in academia, including Nate Foster (Cornell) and Minlan Yu (USC), as well as in industry.

Biographies

Changhoon Kim is Director of System Architecture at Barefoot Networks and is chairing Language Design Working Group for the P4 Language Consortium (P4.org). Before joining Barefoot, he worked at Windows Azure, Microsoft's cloud-service division, and led engineering and research projects on the architecture, performance, management, and operation of datacenter and enterprise networks. Changhoon is interested in programmable network data plane, network monitoring and diagnostics, network verification, self-programming/configuring networks, and debugging and diagnosis of large-scale distributed systems. Changhoon received Ph.D. from Princeton University. Many of his R&D contributions — including VL2, Seawall, EyeQ, Ananta, and SEATTLE — are adopted in large production networks.

Jeongkeun "JK" Lee is a software engineer at Barefoot Networks, developing advanced applications on P4 dataplanes. Prior to Barefoot, he worked at Hewlett-Packard Labs on application/policy-driven networking, contributed to OpenDaylight and OpenStack. He holds 18 networking patents in US and published papers at Sigcomm, Infocom, CoNext, Mobicom, MobiSys.