Program Details
The detailed technical program below is final. All times are in U.S. Mountain Time (UTC-7).
SIGCOMM'26 Best Paper Award
λλ: A Programming Language for Silicon Photonics | Technical Session: Optical & Photonic Fabrics
Vaibhav Mehta, Arjun Devraj (Cornell University), Bill Owens (Nysernet), Justin Hsu, Rachee Singh (Cornell University)
SIGCOMM'26 Best Student Paper Award
Presto: A Match-Action TCP Stack for the Terabit Era | Technical Session: Programmable Switches & Data-Plane Hardware
Rajath Shashidhara (University of Washington), Antoine Kaufmann (Max Planck Institute for Software Systems (MPI-SWS)), Simon Peter (University of Washington)
Papers Info
All Proceedings papers are available in the ACM Digital Library. Use the below link for all proceedings:
Tuesday, August 18
| 11:00 am – 12:25 pm | |
|---|---|
| Track A | Track B |
Research Session 1: LLM Inference & Serving Session Chair: Xiao Yunming KVServe:
Service-Aware KV Cache Compression for Communication-Efficient Disaggregated LLM Serving Abstract: LLMs are widely adopted in production, pushing
inference systems to their limits. Disaggregated LLM serving (e.g., PD separation and KV state
disaggregation) improves scalability and cost efficiency, but it also turns KV into an explicit payload
crossing network and storage boundaries, making KV a dominant end-to-end bottle-neck. Existing KV
compression are typically statically configured at runtime, despite production service context varies over
time in workload mix, bandwidth, and SLO/quality budgets. As a result, a fixed choice can be suboptimal or
even increase latency. We present KVServe, the first service-aware and adaptive KV communication
compression framework for disaggregated LLM serving: KVServe (1) unifies KV compression into a modular
strategy space with new components and cross-method recomposition; (2) introduces Bayesian Profiling
Engine that efficiently searches this space and distills a 3D Pareto candidate set, reducing 50x offline
search overhead; and (3) deploys a Service-Aware Online Controller that combines an analytical latency
model with a lightweight bandit to select profiles under constraints and correct offline-to-online
mismatch. Integrated into vLLM and evaluated across datasets, models, GPUs and networks, KVServe achieves
up to 9.13x JCT speedup in PD-separated serving and up to 32.8x TTFT reduction in KV-disaggregated
serving. DualPath:
Accelerating Agentic LLM Inference by Harvesting Disaggregated KV-Cache Storage I/O Abstract: The performance of multi-turn, agentic LLM inference
is increasingly dominated by KV-Cache storage I/O rather than computation. In prevalent disaggregated
architectures, loading the massive KV-Cache from external storage creates a fundamental imbalance: storage
NICs on prefill engines become bandwidth-saturated, while those on decoding engines remain idle. This
asymmetry severely constrains overall system throughput. We present DualPath, an inference system that
breaks this bottleneck by introducing dual-path KV-Cache loading. Beyond the traditional
storage-to-prefill path, DualPath enables a novel storage-to-decode path, in which the KV-Cache is loaded
into decoding engines and then efficiently transferred to prefill engines via RDMA over the compute
network. DualPath combines this optimized data path — which inherently avoids network congestion and
avoids interference with latency-critical model execution communications — with a global scheduler that
dynamically balances load across prefill and decode engines. Our evaluation on three models with
production agentic workloads demonstrates that DualPath improves offline inference throughput by up to
1.87x on our in-house inference system. It can also improve online serving throughput by an average factor
of 1.96x without violating SLO. Efficient
Remote KV Cache Reuse with GPU-native Video Codec Abstract: Remote KV cache reuse fetches KV cache for identical
contexts from remote storage, avoiding recomputation, accelerating LLM inference. While it excels in
high-speed networks, its performance degrades significantly in bandwidth-limited scenarios. Recent studies
address this by transmitting KV caches in compressed form, but the associated heavyweight decompression
counteracts the KV reuse benefits. In this paper, we propose an efficient and widely deployable remote KV
cache reuse solution that leverages GPU-native video codecs. Our system, KVCodec, enables effective KV
cache coding with two techniques. The codec-friendly tensor layout compresses the KV cache in a highly
compact video format, enabling fast transmission. The efficient KV fetcher orchestrates the transmission,
decoding, and restoration of compressed KV caches in an efficient pipelined manner, eliminating resource
contention, masking network fluctuations, and achieving minimum time-to-first-token (TTFT). We prototype
KVCodec on diverse GPUs from high- to low-end. Experiments reveal that it reduces TTFT by up to 3.51X
while maintaining lossless accuracy, compared to SOTA methods. Connex:
Endpoint Mobility Primitives for Dynamic LLM Serving Abstract: Modern LLM serving systems increasingly adopt elastic
inference pipelines where stages frequently join, leave, and migrate across nodes. However, existing GPU
communication frameworks like NCCL assume static topologies, causing routing failures and P99 latency
spikes during worker transitions that violate sub-millisecond tail latency requirements. We present
Connex, a communication system that elevates endpoint mobility from exceptional failure to first-class
primitive. Rather than optimizing individual mechanisms in isolation, Connex defines a mobility contract
that the communication layer enforces whenever workers join, leave, or migrate while token streams,
activations, or KV transfers are in flight. The contract is realized through three cooperating mechanisms:
(1) epoch-based routing that bounds staleness without global coordination, (2) explicit handover protocols
that preserve stream ordering and provide exactly-once delivery across migrations, and (3) credit-based
backpressure with traffic-class isolation that prevents churn-induced interference with latency-critical
paths. Evaluation on a 5-node GPU cluster under synthetic and production-derived churn shows that Connex
reduces P99 tail spikes by up to 85% compared to NCCL-based baselines, achieves sub-second cutover, and
maintains 100% goodput at moderate loads where baselines collapse to 0–28%, while incurring less than 5%
steady-state overhead. TurboBus:
Pooling PCIe Bandwidth for LLM Workloads via Scale-Up Fabrics Abstract: GPU memory offloading is widely adopted for LLM
workloads but shifts the bottleneck to GPU-CPU transfers, which can take up to 90% of the end-to-end
inference/training time! Paradoxically, over 60% of PCIe bandwidth remains idle. The root cause is that
PCIe links are individually bottlenecked but collectively underutilized. Bursty, phase-driven transfer
patterns leave bandwidth idle both within and across jobs. We present TurboBus, which pools PCIe bandwidth
across co-located jobs via emerging scale-up fabrics. TurboBus enables any GPU to borrow idle PCIe links
from neighboring GPUs, even those belonging to other jobs, while preserving isolation through a privileged
daemon. At the core of TurboBus, it streams data through relay GPUs with bounded memory overhead, keeps
all links busy through fine-grained PCIe allocation, enables bidirectional transfers leveraging
PCIe/NVLink bandwidth asymmetry, and balances fairness and completion time with a size-aware scheduling.
We fully implement TurboBus and our experiments show that it reduces first-token latency by up to 40% for
on-demand model loading (within 5% of the analytical optimum), achieves up to 1.6x throughput for
KV-cache-offloaded inference, and accelerates training by up to 7%, while imposing less than 1% overhead
on co-located workloads. | Research Session 2: Network Verification & Formal Methods Session Chair: Mina Tahmasbi Arashloo Towards
Efficient Verification of Distributed In-Network Computing Programs Abstract: Distributed in-network programs are increasingly
deployed in data centers for their performance benefits, but shifting application logic to switches also
enlarges the failure domain. Ensuring their correctness before deployment is thus critical for
reliability. While prior verification frameworks can efficiently verify programs running on a single
switch, they overlook the common interactive behaviors in distributed settings, thereby missing related
bugs that can cause system failures. This paper presents Procurator, a verification framework that
efficiently captures interactive behaviors in distributed in-network programs. Procurator models each P4
pipeline as a reactive actor and unifies their interactions as message passing to capture interactive
behaviors under an event-driven paradigm. To improve the verification efficiency, Procurator employs an
intermediate representation (IR) pruner to reduce the execution space and a schedule-replay-based
acceleration approach to avoid explicit exploration of long execution traces. Evaluation shows that
Procurator uncovers 28 distinct bugs in twelve real-world distributed in-network systems, and achieves up
to a 9.1X speedup over the state-of-the-art framework. When
static verification is not enough: revealing BGP bugs at runtime Abstract: Operators go to great lengths to ensure their BGP
networks are correct. Yet, despite their efforts, faults still happen due to software or hardware bugs
which can often have detrimental network-wide consequences. Today, all operators can do is react to such
failures, often only once it is already too late. We present GhostBuster, a runtime system which monitors
the execution of BGP routers and verifies their compliance with the protocol specification. Concretely,
GhostBuster checks whether observed outgoing BGP messages could have been produced by incoming ones. The
key challenge in doing so is that BGP routers do not necessarily process incoming messages in order,
forcing one to consider all possible reorderings of input messages. While this obviously does not scale,
we show that one can solve this problem efficiently by reasoning about sets of messages instead of
orderings. We fully implemented GhostBuster and use it to detect (confirmed and previously unknown) bugs
in production routers. Our evaluation on simulated networks further confirms that GhostBuster is both
scalable and accurate: it never falsely reports a bug while detecting over 60% of the bugs. Explainable Network Verification via Localized Subspecification Abstract: Network verification, synthesis, and repair tools help
enforce high-level operational intent, but their limited explainability makes configuration maintenance
costly in practice, as operators must still manually reason about large, low-level configurations. We
propose localized subspecifications, which explain how individual configuration elements preserve a given
network property by constraining their admissible behaviors. A user study with 15 professional network
operators and 8 graduate students shows 52% higher accuracy and 23% time savings, and 70% of participants
reported that they would like to use subspecifications in daily operations, demonstrating practical
benefits. To support real deployments, we develop SpecLens, an explainable network verification system
that generates localized subspecifications using a scalable algorithm with soundness guarantees. SpecLens
computes line-level and field-level subspecifications in 10 minutes on the real-world Internet2
configuration and 25 minutes on FatTree networks with up to 1,280 routers. VeriLucid:
A Verification-aware Data-plane Programming Language Abstract: Correctness is important in data-plane programs, which
run on critical infrastructure connecting millions of users. Verification helps programmers build correct
software, but current data-plane tools can only check simple properties or require immense programmer
effort. As a solution, this paper introduces the first verification-aware data-plane language: VeriLucid.
The core idea is to unify programming and specification in one high-level language, with built-in proof
automation. Integration makes it natural for programmers to use verification continuously throughout
development, like unit testing but with strong guarantees. In evaluation, we show that VeriLucid requires
10X less programmer effort, in terms of lines of code, than other verification tools with comparable
expressiveness. Elastispec: Formalizing Enterprise Firewall Management with Informal and Elastic
Specifications Abstract: Managing enterprise network firewalls is an ad-hoc
process today, where administrators must extract policies relevant to their enterprises from thousands of
natural language vendor documents and tailor them to their unique context. In this paper, we present
Elastispec, a first step towards principled management of enterprise firewall policies with informal and
incomplete specifications. We make three contributions: (i) LLM-assisted formalization of vendor documents
into a custom domain specific language that precisely captures the rich choices and options using a
multi-step consistency-preserving LLM agent; (ii) mapping the DSL to a concrete network environment by
correlating diverse and possibly imperfect enterprise data sources; and (iii) an interactive auditor that
cross-checks firewall configurations against the formal but potentially partial specifications and reports
potential compliance gaps along with conjectures for human validation. Evaluations with real-world
enterprise firewall configurations and popular enterprise application vendor documents show that
Elastispec is effective in enabling operators to audit their configurations against vendor documents by
producing compliance trees, enabling comparative analysis across parallel application deployments, and
detecting configuration errors that permit non-compliant traffic. |
| 1:50 pm – 3:15 pm | |
|---|---|
| Track A | Track B |
Research Session 3: Collective Communication Algorithms Session Chair: James Hongyi Zeng Trivance:
Latency-Optimal AllReduce by Shortcutting Multiport Networks Abstract: AllReduce is a fundamental collective communication
operation in distributed computing and a key performance bottleneck for large-scale training and
inference. Its completion time is determined by the number of communication steps, which dominate
latency-sensitive workloads, and the communication distance affecting both latency- and bandwidth-bound
regimes. Direct-connect topologies, such as Google's TPUv4 tori, are particularly prone to large
communication distances due to limited bisection bandwidth. In this paper, we present Trivance, a novel
AllReduce algorithm that completes within log3 nsteps—a 50% improvement in comparison to Swing and
Recursive Doubling, while reducing congestion compared to Bruck's algorithm by a factor of three and
preserving bandwidth-optimality. Trivance exploits both transmission ports of a bidirectional ring within
each step to triple the communication distance along both directions simultaneously. By performing joint
reductions, Trivance improves both the number of steps and network congestion. We further show that
Trivance extends naturally to multidimensional torus networks, retaining its latency advantage while
achieving performance comparable to bandwidth-optimal algorithms for large AllReduce sizes. Our
packet-level SST simulation shows that Trivance improves state-of-the-art approaches by 5–30% for
AllReduce sizes up to 8 MiB, in high-bandwidth settings up to 32 MiB and for 3D tori up to 128 MiB.
Throughout the evaluation, Trivance remains the best-performing latency-optimal algorithm. OptCCL:
Scalable Synthesis of Optimal Collective Communication Algorithms Abstract: We present OptCCL, a technique to synthesize
collective communication algorithms that are optimal for a given host and network hardware and topology.
OptCCL is general: it enables synthesizing optimal algorithms for all existing collectives, for all
existing hardware, and even for multiple concurrent collectives sharing host and network resources. And
yet, OptCCL is scalable: it synthesizes optimal algorithms for hundreds of GPUs within tens of minutes. DynamiQ:
Accelerating Gradient Synchronization using Compressed Multi-hop All-reduce Abstract: Multi-hop all-reduce is the de facto backbone of large
model training. As the training scale increases, the network often becomes a bottleneck, motivating the
reduction of the volume of transmitted data. Accordingly, recent systems have demonstrated significant
acceleration of the training process using gradient quantization. However, these systems are not optimized
for multi-hop aggregation, where entries are partially summed multiple times along their aggregation
topology. We present DynamiQ, a quantization framework that bridges the gap between quantization best
practices and multi-hop aggregation. DynamiQ introduces novel techniques to better represent partial sums,
co-designed with a decompress-accumulate-recompress fused kernel to facilitate fast execution. We extend
PyTorch DDP to support DynamiQ over NCCL P2P, and across different LLMs, tasks, and scales, we demonstrate
consistent improvement of up to 34.2% over the best among state-of-the-art methods such as Omni-Reduce,
THC, and emerging standards such as MXFP4, MXFP6, and MXFP8. Further, DynamiQ is the only evaluated method
that consistently reaches near-baseline accuracy (e.g., 99.9% of the BF16 baseline) and does so while
significantly accelerating the training. ZipCCL:
Efficient Lossless Data Compression of Communication Collectives for Accelerating LLM
Training Abstract: Communication has emerged as a critical bottleneck in
the distributed training of large language models (LLMs). While numerous approaches have been proposed to
reduce communication overhead, the potential of lossless compression has remained largely underexplored
since compression and decompression typically consume larger overheads than the benefits of reduced
communication traffic. We observe that the communication data, including activations, gradients and
parameters, during training often follows a near-Gaussian distribution, which is a key feature for data
compression. Thus, we introduce ZipCCL, a lossless compressed communication library of collectives for LLM
training. ZipCCL is equipped with our novel techniques: (1) theoretically grounded exponent coding that
exploits the Gaussian distribution of LLM tensors to accelerate compression without expensive online
statistics, (2) GPU-optimized compression and decompression kernels that carefully design memory access
patterns and pipeline using communication-aware data layout, and (3) adaptive communication strategies
that dynamically switch collective operations based on workload patterns and system characteristics.
Evaluated on a 64-GPU cluster using both mixture-of-experts and dense transformer models, ZipCCL reduces
communication time by up to 1.35X and achieves end-to-end training speedups of up to 1.18X without any
impact on model quality. Theseus:
Runtime-Adaptive GPU Collective Communication with Hot-Swappable Schedules Abstract: Current GPU Collective Communication Libraries (CCLs)
employ predefined schedules optimized for stable environments. Their supported schedules and selection
logic are fixed at communicator initialization, which fails to account for evolving runtime conditions,
such as workload characteristics and hardware health status. Consequently, long-running GPU jobs
experience suboptimal performance after hours or days of execution, which translates into longer job
completion times and wasted GPU cluster resources. To address this problem, we present Theseus, a novel
CCL backend that provides schedule-level runtime adaptivity. It admits user-defined schedules and
selection policies. As runtime conditions change, Theseus selects suitable schedules using cluster-wide
runtime attributes beyond CCL-internal metrics. Moreover, it hot-swaps from the previous schedule
consistently across GPUs with low overhead. Theseus acts as a drop-in replacement to facilitate
integration. We evaluate Theseus extensively on various GPU workloads with intuitive policies. Compared
with NCCL, Theseus achieves up to 1.61X speedup of communication time in stable environments and 2.46X in
dynamic environments. It improves end-to-end job completion time by up to 1.84X while incurring comparable
or lower overhead. | Research Session 4: Cellular & RAN Systems Session Chair: Daehyeok Kim CausalTune: Causal Learning based Automated Cellular RAN Configuration Tuning
Framework Abstract: Continual configuration tuning in cellular radio
access networks (RANs) is critical for maintaining performance, reliability, energy efficiency, and user
experience. However, this task remains largely manual in practice. Automating it needs to confront
high-dimensional configuration spaces, sparse and biased exploration, strong parameter interactions, and
substantial environmental confounding. Existing RAN configuration tuning approaches have limited
effectiveness in addressing these challenges. In this paper, we present CausalTune, a novel causal
learning framework for automated RAN configuration optimization based on observational telemetry.
CausalTune disentangles configuration effects from environmental and operational confounders, generalizes
to sparse and previously unseen parameter settings, and captures high-impact multi-parameter interactions.
Our key insight is that effective causal inference in operational RANs requires reshaping raw telemetry to
expose confounding and learning environment-invariant mechanisms. Guided by this insight, CausalTune
employs a multistage pipeline that integrates distributional representation learning, causal modeling, and
interaction-aware recommendation. We evaluate CausalTune using 10 months of RAN measurement data from 1M
commercial cells of a major cellular operator. Our comparison to state-of-the-art baselines shows that
CausalTune achieves up to 3X KPI improvement on the held-out dataset. In terms of causal modeling quality,
CausalTune achieves up to 12X lower KPI reconstruction error; on recommended configuration safety, it
achieves 4X higher agreement with expert engineers while significantly reducing off-target
recommendations. These findings demonstrate the potential of causal learning to enable reliable, scalable,
and interpretable RAN configuration tuning. SAGE: A
Real-Time AI System for Reducing Latency in NextG Cellular Networks Abstract: NextG applications such as AR/VR, industrial
automation, cloud gaming, and autonomous robots increasingly demand lower latencies. Current 5G networks,
however, incur significant delays due to request-based scheduling, where users must signal demand before
the base station can allocate resources for uplink transmissions. In this paper, we present Sage, a
real-time AI system that can predict per-user uplink demand at millisecond granularity and proactively
allocate resources to reduce uplink latency. Sage proposes traffic trains: a novel abstraction that
mitigates distortions to the observed traffic arrivals at the base station and yields stable prediction
targets. Sage extracts statistical features from user traffic and retrieves appropriate models from a
traffic-aware database of dedicated AI predictors. Sage further executes low-latency inference, error
tracking, and online continual learning to dynamically adapt prediction models. Extensive evaluation shows
that Sage achieves millisecond-level prediction accuracy with sub-millisecond inference overhead, reducing
uplink latency by 2.53X on average across diverse applications while maintaining high resource efficiency. RANPilot:
Making AI Functionalities Robust to Dynamic O-RAN Reconfigurations Abstract: The Open Radio Access Network (O-RAN) promises
unprecedented flexibility through its reconfigurable architecture and AI-driven control. However, this
agility exposes a critical fragility: AI models trained on one network configuration suffer significant
performance degradation after an upgrade due to dramatic data drift. The standard solution, reactive
retraining, is unacceptably slow, leaving the network in a suboptimal state for tens of minutes and
undermining the core benefits of O-RAN's dynamism. This paper introduces RANPilot, the first framework
to address this challenge through proactive AI adaptation. RANPilot constructs a lightweight "virtual
O-RAN" (a trace-driven emulator) to synthesize high-fidelity training data representing the
post-reconfiguration state before the physical change occurs, allowing AI models to be adapted in advance.
Extensive experiments on a real-world 5G testbed demonstrate that RANPilot achieves near interruption-free
AI services upon reconfiguration, reducing AI downtime by 85% to 94% against reactive baselines. By
shifting the AI evolution paradigm from reactive redevelopment to proactive preparation, RANPilot explores
a digital-leadoff approach to enable robust AI in reconfigurable O-RAN deployments. Synchronizing with the Scheduler: Dual-Loop Congestion Control for 5G Uplink on Commodity
Devices Abstract: Current end-to-end congestion-control feedback is too
slow to track rapid wireless dynamics in cellular networks. We identify Grant-to-Buffer Ratio (GBR)—the
ratio of base-station uplink grants to mobile-reported demand—as a millisecond-scale RAN signal of uplink
resource scarcity. Measurements across AT&T, Verizon, and T-Mobile LTE/5G FDD/TDD deployments show
that GBR tracks base-station uplink load and reveals congestion earlier than end-to-end feedback. Because
GBR is derived from the mandatory BSR-grant exchange, it requires no base-station changes and captures
scheduler decisions at their native timescale. We then design GBR-CC, a dual-loop controller that updates
the sender rate on each GBR sample, using GBR for fast adaptation and end-to-end delay trends as a
conservative fallback. This design lets the sender react before queues inflate while still handling
non-radio bottlenecks through the outer loop. GBR-CC runs on commodity mobile devices without extra
hardware or external tools. Experiments on commercial cellular networks show that GBR-CC improves average
throughput over GCC by 50%, while reducing median playout latency by 32–53% and freeze rate by 60%;
compared with BBR, it improves average throughput by 5% and halves median RTT. Unveiling
Low-Altitude 5G Performance: Linking Key Influencing Factors with UAV Flight Parameters Abstract: Although 5G is widely regarded as a key technology for
unmanned aerial vehicle (UAV) cellular communications, its practical performance in low-altitude scenarios
remains insufficiently understood. To address this, we conduct large-scale flight measurements over
commercial 5G networks and build a cross-layer dataset to compare communication performance between
low-altitude and ground. By jointly analyzing 5G configurations, link-layer parameters, and end-to-end
metrics, we identify four key factors that significantly affect low-altitude performance: spatial layers,
modulation order, handovers, and resource block allocation. Controlled measurements reveal the coupling
between UAV flight parameters and these factors. We also discover that network mechanisms optimized for
ground scenarios exhibit mismatches in low-altitude environments. For example, we observe a
"pseudo-successful handover" phenomenon that rarely appears on the ground yet becomes an
important source of unreliable connectivity. These findings provide empirical evidence and insights for
improving the reliability of cellular-connected UAVs. |
| 3:40 pm – 5:40 pm | |
|---|---|
Community Session |
Wednesday, August 19
| 8:20 am – 9:45 am | |
|---|---|
| Track A | Track B |
Research Session 5: In-Network Aggregation for ML Session Chair: Aurojit Panda Turbo:
Efficiently Serving Long-Context Large Language Models with In-Network Aggregation Abstract: LLM supporting long contexts faces a critical memory
bottleneck due to the linear growth of KV cache. Distributing the storage across multiple GPUs alleviates
this burden but introduces significant communication overhead or traffic incast, especially during the
decoding phase. We propose Turbo, a first-of-its-kind in-network aggregation system that accelerates
long-context inference by offloading query broadcast and attention aggregation to switches. We address
three key challenges to map complex attention mechanisms onto restricted switch hardware: (i) To bypass
the switch's inability to buffer global states or perform complex operations, we devise online
table-based aggregation, which decomposes global reduction into pairwise operations and approximates
nonlinear functions via lookup tables. (ii) To circumvent the restriction on retroactive state access in
RMT pipelines, we introduce a rolling forward scheme that propagates states to enable cross-stage updates.
(iii) To mitigate aggregation stragglers caused by topology-induced load imbalance, we construct a
load-aware aggregation tree that optimizes workload distribution. Evaluations on a Tofino2-based testbed
show that Turbo reduces end-to-end inference latency by up to 37%. Large-scale simulations on NS-3
demonstrate that Turbo significantly outperforms state-of-the-art baselines in both inference latency and
network traffic reduction with negligible accuracy loss. HyNA:
Taming Tail Latency in MoE Training with Hybrid Switch Silicon Abstract: The transition to trillion-parameter models,
particularly Mixture-of-Experts (MoE), shifts the bottleneck of distributed training from computation to
communication. However, existing Parameter Server (PS) architectures succumb to incast congestion, while
state-of-the-art In-Network Aggregation (INA) solutions like ATP fail to handle the sparse, bursty traffic
of MoE workloads. These solutions suffer from severe tail latency amplification due to their reliance on
slow, host-based fallbacks for collisions and overflows. To dismantle this communication wall, we propose
HyNA, a fully serverless aggregation system that eliminates dedicated parameter-server nodes by leveraging
a novel hardware-software co-designed switch architecture. HyNA couples wire-speed Reconfigurable Match
Tables (RMT) with embedded RISC-V cores. By adhering to a strict on-chip closure principle, the system
processes all traffic anomalies—including hash collisions and floating-point variances—entirely within the
switch ASIC, converting unpredictable network RTT into deterministic on-chip latency. We validate our
design through a 100 Gbps FPGA prototype and a 7nm ASIC synthesis analysis. Results demonstrate that HyNA
incurs less than 3% silicon area overhead while improving aggregation throughput by 7.35X over BytePS and
1.4X over ATP. Crucially, in the MoE gradient synchronization phase, the system eliminates the fallback
penalty and reduces synchronization time by up to 1.6X compared to dynamic INA baselines, without
compromising bit-level model accuracy. EPIC:
Abstraction and Polymorphism of In-Network Collectives on Ethernet Abstract: In-Network Collective (INC) acceleration holds immense
potential for optimizing AI training and inference; however, its cross-layer nature has historically
hindered investment and adoption within the open Ethernet ecosystem. To bridge this gap, we propose EPIC
(Ethernet Polymorphic In-network Collectives), an INC protocol specification and reference system built on
the principle of "Unified Abstraction, Polymorphic Realization." EPIC introduces an abstraction
compatible with standard Ethernet that aligns functional boundaries with participant roles, while offering
polymorphic realizations tailored to varying hardware capabilities. We address three fundamental
challenges: first, we employ a modular design that enables an evolutionary path from simple to complex
implementations, allowing vendors to iterate their hardware incrementally; second, we apply formal
verification methodologies to prove the correctness of all proposed polymorphic modes; and third, we
develop a unified resource management model versatile enough for diverse INC scenarios. We conduct
extensive experiments—model checking, packet/flow simulations, VM emulation, Tofino/NP Testbed, and
FPGA/RTL verification—to validate EPIC's correctness, performance gains, and feasibility. PReCCL:
Performant and Resilient Collective Communication via Integrated Inband Telemetry and Workload
Reallocation Abstract: Modern collective communication libraries (CCLs)
execute a collective communication task (CCT) by decomposing it into multiple sub-tasks, each mapped to a
specific Virtual Topology (VT), which is an ordered graph of GPUs (e.g., a ring or a tree), to maximize
parallelism and link utilization. As AI training scales to larger clusters, network anomalies (congestion
and failures) are unavoidable, and a single straggling VT can delay the entire CCT. Existing solutions
either rely on low-level transport-layer solutions which lacks a cross-sub-task perspective, or static CCL
scheduling, failing to adapt to the dynamic and heterogeneous networks. We present PReCCL, a drop-in NCCL
replacement that combines software inband telemetry with cross-VT workload reallocation. Unlike
hardware-dependent telemetry (e.g., P4-INT), PReCCL implements in-band monitoring within the CCL. It
precisely measures the stall counts of each VT, and piggybacks the telemetry meta-data on existing
collective traffic. With this fine-grained visibility, PReCCL employs a dynamic cross-VT reallocation
mechanism that shifts workloads from straggler VTs (suffering from congestion or faults) to healthy ones.
Reallocation occurs only at CCT boundaries using an epoch-based deterministic protocol, avoiding
cross-rank consistency races. We implement PReCCL in NCCL and evaluate it on a 32-GPU testbed, large-scale
simulation, and a 1024-GPU production cluster. On the testbed, PReCCL improves CCT completion by up to
2.1X and end-to-end training by 1.21X, with low overhead above tuned message-size thresholds. UBEP:
Re-architecting Expert Parallelism Communication Library for Production Superpods Abstract: The deployment of Mixture-of-Experts (MoE) models on
production high-bandwidth superpods, such as NVIDIA's NVL72/576 and Huawei's CloudMatrix384,
introduces critical challenges beyond raw interconnect bandwidth. While these systems provide unified
global address spaces and high-bandwidth fabrics, their full potential for sparse MoE communication is
hindered by three fundamental bottlenecks: (1) Strict execution serialization imposed by coarse-grained
Bulk Synchronous Parallel (BSP) orchestration of interdependent communication phases; (2) Prohibitive
synchronization overhead that fails to scale alongside high interconnect bandwidth; and (3) Severe load
imbalance resulting from distance-agnostic scheduling of irregular token traffic. To eliminate these
bottlenecks, we introduce UBEP (Unified-Bus Expert Parallelism), a production-ready communication library
that rethinks MoE's All-to-All primitives for modern superpod architectures. Through large-scale
experiments, UBEP reduces All-to-All latency by up to 52.4% and MoE inference Time Per Output Token (TPOT)
by up to 11.1%. | Research Session 6: Cloud Networking: DPUs, SmartNICs & Gateways Session Chair: Gianni Antichi Dorado:
Scaling SmartNIC Session Tables on Commodity DDRs Abstract: FPGA-based SmartNICs are widely deployed for cloud
network function acceleration, but their memory subsystem is under increasing pressure because of large
session tables. Conventional wisdom suggests that high packet processing performance relies on advanced
memories (e.g., SRAM, HBM), but those are costly to add at cloud scale. Dorado is a novel design that
scales SmartNIC session tables entirely on inexpensive DDR modules. At the heart of Dorado are three new
techniques that extract commodity DDR performance by restructuring session table layout, decomposing
processing pipelines to reduce locking, and scheduling memory accesses to minimize stalls. Our testbed
results show that Dorado improves packet processing rates by 33%, even with fewer hardware resources.
Further, we have deployed Dorado to millions of servers, processing network traffic from billions of users
on a large public cloud for over three years. Our production results show that Dorado can accommodate up
to 16M session entries, reduce memory cost by 80%, while enabling 50Mpps line-rate processing. XFir:
Accelerating New-Flow Setup on Host Servers of a Large Cloud Network Abstract: In today's cloud networks, host servers widely
deploy Data Processing Units (DPUs) as network accelerators under the "Sep-Path" paradigm.
However, as server capabilities scale with increasing CPU cores and network bandwidth, the software slow
path (executed on a DPU's CPU) has become a critical bottleneck for workloads with high new-flow
rates. Meanwhile, new-flow setup logic on host servers must continuously evolve to meet diverse and
changing customer demands, making flexibility a key requirement alongside performance. To address this
gap, we present XFir, the first hardware-accelerated new-flow setup system for cloud host servers that
delivers high CPS throughput while preserving sufficient flexibility. XFir leverages a next-generation DPU
equipped with a Cloud Network co-Processor (CNP) to execute the host server's new-flow setup logic.
XFir redesigns the host-server flow-setup datapath and table layout, optimizes LPM lookups, and introduces
CPU-CNP collaboration mechanisms to further improve performance and reliability. Our evaluation shows that
XFir achieves over 776K new-flow CPS on a single host server with 11.7μs slow-path latency. Compared to
prior work (Fornax), XFir achieves 4.8x CPS and reduces latency by 69.2%. Moreover, XFir is cost-effective
to deploy, requiring only a single DPU per host. Overall, XFir improves new-flow throughput while
maintaining development flexibility at low financial cost. FlowTurbo:
From Best-Effort to Hit-Driven MegaFlow Hardware Offloading in Open vSwitch Abstract: Offloading fast-path MegaFlows in Open vSwitch to
hardware accelerators is a common approach for accelerating packet forwarding in modern cloud data
centers. However, due to the limited capabilities of current hardware accelerators, existing solutions
still rely on coarse-grained, best-effort offloading, which struggles with dynamic, large-scale traffic
and results in inefficient resource utilization and limited performance gains. We present FlowTurbo, a
self-adaptive, system-level offloading approach that implements hit-driven MegaFlow hardware offloading by
jointly optimizing software rule scheduling and hardware rule lookup. The core innovations of FlowTurbo
are threefold: (1) a traffic-aware, hit-driven MegaFlow offloading framework that selectively migrates
hotspot wildcard rules to hardware; (2) a domain-specific, hardware-friendly sketch for MegaFlow rules
that tracks rule hotness and enables the scheduler to make timely and precise offloading decisions; and
(3) a domain-specific, algorithm-hardware co-designed packet classification accelerator that supports both
line-rate rule matching and online rule updates. We implemented FlowTurbo on Open vSwitch and prototyped
its hardware accelerator on a Xilinx Alveo U200. Evaluation using multiple real-world traffic traces shows
that FlowTurbo achieves an average acceleration coverage of 89.4%, and the hardware accelerator delivers a
maximum throughput of 400 MOPS while consuming only 3.3% of FPGA logic resources. CubeTrace:
Microscopic Network Tracing for Heterogeneous Cloud Gateways Abstract: Modern cloud gateways have evolved to include diverse
network functions and heterogeneous hardware, such as programmable switches and FPGAs, to handle
increasing workloads and minimize forwarding latency. Existing network tracing tools, however, operate
primarily at device granularity and cannot pinpoint which function on which hardware component causes
packet losses or latency spikes. To bridge this gap, we present CubeTrace, a unified, function-level flow
tracing system that enables microscopic tracing inside heterogeneous cloud gateways. CubeTrace
standardizes tracing units as cubes across different hardware platforms, regardless of their varied
underlying implementations, and operates at flow granularity for reliability reasons. This introduces a
new tracing abstraction for heterogeneous gateways while maintaining low overhead. Moreover, the collected
flow-cube data by CubeTrace can be decoded into packet-level representations and integrated with
well-established distributed tracing frameworks, enabling the use of off-the-shelf analysis tools. Our
evaluations demonstrate that CubeTrace introduces minimal overhead, consuming less than 1% of memory
resources and adding less than 1% to forwarding latency. Having been deployed in a large-scale cloud
gateway, CubeTrace has significantly improved problem localization, reducing resolution times from hours
or even days to just minutes. Rethinking
Cloud Optimization: Volatility-Driven for Better Outcomes Abstract: Cloud providers commonly employ oversubscription
strategies to maximize profitability, leveraging the significant gap between the resources purchased by
tenants and those actually consumed by their workloads. However, the temporal volatility of workloads may
lead to overload on oversubscribed nodes. To address this issue, existing works typically focus on
designing reactive rescheduling mechanisms triggered by overload events or adopt conservative
oversubscription strategies to mitigate overload risks. Nonetheless, these solutions compromise either
tenant experience or provider profitability. In fact, reducing the temporal volatility of workloads is key
to addressing the above challenges. We observe that many workloads exhibit temporal complementarity.
Aggregating such workloads can effectively mitigate temporal volatility, thereby improving overall
resource utilization. Motivated by this insight, we first design a new metric, called Maximum-based
Coefficient of Variation (MCV), to quantify the temporal volatility of workloads. We then propose Hestia,
a framework that achieves long-term stable oversubscription through workload aggregation. Specifically, we
propose a smoothing-based method to classify workloads suitable for aggregation according to their
periodicity. Subsequently, we design an aggregation algorithm to minimize the overall MCV, and treat the
aggregated workloads as the units for oversubscription. Experimental results show that, using CPU as a
representative example, Hestia reduces MCV by 43.3% and increases oversubscription profit by 66.74%. |
| 10:10 am – 11:35 am | |
|---|---|
| Track A | Track B |
Experience Session 1: AI Datacenter Networks & Communication Session Chair: Zhuolong Yu Connecting
100K+ GPUs: Building the Communication Stack for Large-Scale LLM Training Abstract: The arrival of 100K+ GPU clusters marks a new frontier
in AI infrastructure. Standard communication stack meets new challenges as physical topologies span
multiple datacenter buildings, introducing high bandwidth-delay product links where latency increases by
up to 30× compared to intra-rack traffic. Furthermore, the transition toward Mixture-of-Experts
architectures generating bursty all-to-all patterns that create transient congestion hotspots. These
constraints, combined with an operational environment where hardware failures shift from anomalies to
frequent occurrences, renders traditionally lightweight operations like initialization and resource
management challenging. We present Meta's network architecture and software stack designed to support
one of the world's largest RoCE fabrics, currently connecting over 100,000 GPUs across multiple
datacenter buildings. To overcome scaling barriers, we introduce a scalable initialization strategy that
reduces startup times by 11× via eager process group creation and O(N) topology discovery, alongside
a resource management system that cuts GPU memory usage by 2× through on-demand allocation. We
further detail a custom transport layer utilizing Dynamic Queue Pair Load Balancing to saturate links, and
a set of operation toolings. These innovations have been deployed in production, providing the
foundational communication fabric for training state-of-the-art Large Language Models. DistDPU: A
Disaggregated DPU Architecture for High-Performance and Cost-Efficient AI Clouds Abstract: AI training and inference are driving cloud networks
toward terabit-per-second (Tbps) bandwidth per server, challenging the scalability and efficiency of
today's cloud network architectures. A prevalent design scales bandwidth by stacking monolithic Data
Processing Units (DPUs), but this approach tightly couples control and data plane resources, leading to
excessive cost, power consumption, and operational complexity. We identify a fundamental control-data
plane divergence in AI clouds: while data plane bandwidth demand grows rapidly, control plane demand
remains largely flat due to the dominance of elephant flows. As a result, monolithic DPUs become
systematically over-provisioned when used as bandwidth scaling primitives. We present DistDPU, a
disaggregated DPU architecture that redefines the scaling abstraction for high-bandwidth cloud networking.
DistDPU decomposes a monolithic DPU into lightweight, bandwidth-provisioning Execution Modules (EMs) and a
shared, control-centric Orchestration Module (OM), enabling independent scaling of data and control plane
resources. By scaling out low-cost EMs under a single OM, DistDPU exposes a unified, high-bandwidth
logical DPU interface to the cloud management plane. To preserve RDMA performance and multi-tenant
isolation at scale, we co-design the EM-OM functions and the inter-module fabric to minimize
virtualization overhead while enforcing security and manageability invariants equivalent to those of a
monolithic DPU. DistDPU has been deployed in production for two years. It serves more than 10,000 GPUs and
delivers higher efficiency and strong performance on real-world AI workloads than state-of-the-art
designs. Pegasus: A
Data Center Network for Bare-Metal AI Cloud Abstract: Today, AI cloud is key to serving diverse users with
AI services, where cloud networking forms the basis. In this paper, we share our experience in designing,
deploying, and operating Pegasus, a data center network tailored for the AI cloud, along with operational
lessons learned from its deployment. The key designs of Pegasus include: 1) Network virtualization: a
DPU-RNIC decoupled collaborative hardware architecture to enable a single DPU to virtualize multiple RNICs
while reducing the power consumption. We design two-level flow tables on both DPU and RNICs to support
underlay-overlay IP address translation and ensure isolation. For DPU-RNIC communication, we introduce a
per-RNIC communication state machine to reduce communication overhead. 2) Network transport: customized
and transparent transport offloading in the RNIC for low-latency and high-throughput communication
performance for various AI workloads. We carefully offload per-packet load balancing and credit-based
congestion control in RNICs, optimizing reorder delay and eliminating the impacts of hardware jitter.
Pegasus has been deployed in production for over two years, currently covering 8K GPUs and supporting a
wide range of tenants' AI applications. Balancing
and Beyond: Communication-Centric Optimizations in Expert Parallelism Abstract: The Mixture-of-Experts (MoE) architecture scales large
language models (LLMs) to trillions of parameters by activating only a small subset of experts per token.
In practice, MoE inference is commonly deployed with Expert Parallelism (EP), which places whole experts
on different GPUs to preserve kernel efficiency. However, production EP deployments often suffer from two
bottlenecks: (1) expert workload imbalance, which creates computation and communication stragglers, and
(2) communication inefficiency, where inter-GPU transfers dominate latency even after balancing. We
present EPIC, an experience-driven EP inference system that addresses these issues progressively for real
deployments. EPIC mitigates imbalance via performance-aware expert migration and runtime expert
activation, and then improves communication with topology-adaptive transport kernels and fine-grained
computation-communication overlap. EPIC has been deployed at scale across O(10K) GPUs in our online
inference service for both open-source models (e.g., Qwen3-Coder and DeepSeek-R1) and internal models,
reducing communication time and per-token latency by up to 40% and 21%, respectively. Sponsored Session: Meta Networking for Meta's Gigawatt-scale AI
fleet Abstract: As generative AI and large-scale model training
rapidly expand, underlying infrastructure must scale to support massive compute requirements. This talk
explores the architectural evolution of Meta’s networking infrastructure to support its gigawatt-scale AI
fleet. We examine the core tiers of Meta’s AI networking footprint and share key operational lessons and
design principles learned from deploying and managing these networks at scale. | Research Session 7: Wireless, Backscatter & Sensing Session Chair: Mallesham Dasari FlowForm:
Scalable Passive Metasurface Network for mmWave Coverage Expansion Abstract: Millimeter wave (mmWave) networks offer multi-gigabit
data rates but suffer from severe path loss and blockage, resulting in spotty coverage. Emerging
reconfigurable intelligent surfaces (RIS) can mitigate these challenges, but their reliance on active
control channels, power sources, and complex runtime coordination imposes significant hardware and
deployment overhead. This paper introduces FlowForm, a system that expands mmWave coverage using networks
of passive metasurfaces that require no power, control, or runtime coordination. FlowForm's key
innovation is a hierarchical flow topology that organizes passive metasurfaces into major flows
(directional relay chains using near-field focusing) and minor flows (wide-area fan beams), enabling
multi-hop passive routing and over-the-air combination of analog signals. We develop a theoretical
framework establishing the optimality of this topology and a hierarchical optimization algorithm that
jointly determines metasurface placement and beam configurations. FlowForm operates transparently with
standard mmWave network protocols, managing channel dynamics and multi-user interference through
diversity-aware design rather than runtime reconfiguration. Our experimental evaluation across five indoor
environments demonstrates up to 94% average rate improvement and 114% coverage expansion using low-cost
3D-printed metasurfaces ($2 per unit), achieving performance comparable to active RIS at orders of
magnitude lower cost. Concurrent
OFDM Backscatter with a Single Commercial Receiver Abstract: Concurrent OFDM backscatter is promising for enabling
efficient connectivity of soaring ultra-low power IoT devices. However, the existing designs rely on
frequency-domain division, suffering from short synchronization distance, poor interference robustness and
incompatibility with commercial Wi-Fi receivers. We present C2Scatter, the first concurrent OFDM
backscatter system that decodes the tags' data in parallel with a single commercial OFDM Wi-Fi
receiver. It is enabled by two key techniques. (1) A pulling-driven synchronization scheme on tags that
achieves long-distance synchronization by exploiting the injection-pulling capacity rather than amplifying
the received signal, thereby resolving the sensitivity-power trade-off in the prior works. (2) A
lightweight delay-domain division scheme that deliberately introduces a unique time offset (TO) used as
each tag's signal characteristic to separate concurrent tags' signals in the delay domain. The
constructed delay-domain characteristics also tolerate frequency-domain distortion, enabling robust
decoding with commercial Wi-Fi receivers. We prototype and test C2Scatter. Our design achieves 37dB higher
sensitivity with 131.1× lower power consumption than the amplification-driven synchronization
schemes, and is compatible with commercial 802.11n Wi-Fi NICs with the BER reduced by 179.1× and
75.6× at no cost of throughput compared with the SOTA NanoScatter and ConcurScatter, respectively. Deep-Soil
Acoustic Backscatter Networking for Electrical Substation Grounding Assessment Abstract: Electrical substation grounding integrity is
fundamental to power system safety, yet its long-term performance is strongly influenced by soil
conditions that are difficult to monitor continuously. Existing underground sensing approaches are largely
ineffective due to severe signal attenuation in soil, strong electromagnetic interference, and frequent
exposure to high-voltage strikes. In this work, we present SoilCapsule, a distributed, battery-free,
capsule-style acoustic backscatter sensing system for substation grounding assessment. SoilCapsule
harvests ultrasonic energy for computation, sensing, and communication, making it inherently resilient to
high-voltage strikes. We design, prototype, and experimentally evaluate the complete end-to-end system.
Experimental results show that the proposed grid-to-soil power delivery approach can energize sensors
buried at a depth of 100 cm while requiring only 6.17 ppm of the transmit power needed by conventional
surface-to-soil schemes to achieve comparable depth. Finally, a field deployment of 20 SoilCapsule sensors
in an operational medium-sized electrical substation demonstrates the feasibility of long-term grounding
monitoring in real-world environments. Concord:
Airtime-Aware Contention Control for Taming Tail Latency from Wi-Fi Frame Bursting Abstract: In congested Wi-Fi, sending less does not guarantee
lower latency. Based on measurements on commodity Wi-Fi routers in the wild, sparse microflows can suffer
bulk-like tail latency even at negligible load. This latency is driven by MAC-level contention dynamics
rather than a flow's sending rate, rendering rate-based congestion control ineffective. We present
Concord, a Wi-Fi MAC mechanism that makes burst airtime an explicit control signal and penalizes excessive
medium holding. Concord operates entirely within the Wi-Fi driver, requires no flow classification, no
client or protocol changes, and incurs only O(1) work per burst. Concord shows that controlling
medium-holding time, rather than transmission rate, is key to tail latency in WLANs. With four saturated
downlink contenders, Concord reduces the 99.9th-percentile enqueue-to-ACK latency of 100 B microflows from
298/461 ms (IEEE baseline / vendor bursting) to 42 ms without sacrificing bulk throughput. For interactive
workloads (cloud gaming), it cuts 99.9th-percentile latency from 231/441 ms to 92 ms and reduces
starvation by up to 10× versus the default IEEE stack. LITE:
Loss-resilient Immersive Telepresence with Multi-modal Semantics Abstract: Immersive telepresence has the potential to transform
real-time communication through highly interactive and engaging experiences. Despite recent advances in
reducing communication and computation costs, existing systems largely overlook packet loss, which can
severely degrade the quality of experience (QoE). Recovering lost immersive content is considerably more
challenging than in 2D video due to the complexity of dense 3D representations. Recovery must be both
accurate and timely while minimizing the communication and computation overhead it incurs. To address
these challenges, we present LITE, the first loss-resilient immersive telepresence system. LITE
incorporates three key design principles: (1) leveraging semantic communication to transmit compact motion
and audio semantics, which can be reconstructed into the remote user's immersive representation and
voice, enabling fast semantic-level recovery and remaining robust to congestion-control-induced rate
reductions under loss; (2) fusing audio and motion semantics via a lightweight multimodal model to achieve
accurate, real-time recovery of motion semantics; and (3) encoding audio semantics from multiple past
frames into succinct neural redundancy to enable robust recovery. We prototype LITE using a well-known
parametric facial motion representation and extensively evaluate its performance across diverse networks.
Our results demonstrate that LITE improves QoE by up to 109% compared with existing schemes, while
sustaining real-time streaming at 30 frames per second and preserving high visual fidelity (structural
similarity index measure above 0.9, where 1 indicates perfect similarity). |
| 11:45 am – 12:45 pm | |
|---|---|
| Track A | Track B |
Non-paper Session: "Beyond GPUs: Networking and Systems Problems in Distributed LLM Serving" | |
| 1:50 pm – 3:00 pm | |
|---|---|
| Track A | Track B |
Research Session 8: Scale-Up Fabrics: Measurement & Design Session Chair: Liangcheng Yu FabricPerf: Measuring NIC-less Scale-Up Network through GPU Communication Kernel
Profiling Abstract: The rapid growth of distributed machine learning
systems shifts ML networks from the CPU/GPU-NIC to GPU-Fabrics architectures, creating an emerging need to
measure and optimize NIC-less Scale-up networks. Yet, the disappearance of NICs removes key observability
points and leaves existing measurement tools largely limited to coarse, application-layer telemetry. We
present FabricPerf, a Scale-up network measurement toolkit that enables fine-grained packet-level
timestamping and cross-layer hardware insights. FabricPerf uses a software-hardware co-design that
integrates protocol-level probing and GPTP clock synchronization within GPU communication kernels with
memory profiling of physical pipelines. We implement FabricPerf for the CUDA/NvLink ecosystem and validate
its high precision and low overhead via extensive experiments on H100 and GB200 NVL72. Using FabricPerf,
we explore Scale-up network dynamics under varied configurations, with two case studies that reveal
critical bottlenecks: (i) channel imbalance in high P99 latency and (ii) memory pipeline inefficiency of
~0% LLC hit-rate. To mitigate these issues, we leverage work-stealing to rebalance channels by 46% and
boost throughput by 17.5GB/s, and optimize LLC eviction priorities for memory flows to elevate the LLC
read hit-rate to ~35%, yielding 16.07GB/s bandwidth improvement. We believe FabricPerf improves Scale-up
network observability, laying a foundation for more complete and efficient network stacks. FabricPerf is
open-sourced at github.com/open-neutrino/fabricperf. Efficient
and Flexible Datapaths for Fine-Grained Rack-Scale Interconnects with Elastic QP Abstract: Rack-scale interconnects serve as critical datapaths
for emerging communication-intensive systems to scale up. Innovative solutions for this datapath are
rising at a rapid pace, especially those based on Ethernet. However, existing hardware-based solutions,
such as RDMA, face performance issues, particularly for small-message memory access, and suffer from the
inflexibility of hardware-fixed processing. The community is actively pursuing efficient, flexible, and
cost-effective rack-scale datapaths. In this work, we propose Software-Interposed Datapath (SID), an
efficient, software-flexible, and low-cost solution for rack-scale interconnects, particularly optimized
for fine-grained memory access. Improving small-message efficiency is a well-known challenge, and software
involvement for flexibility seems to amplify the performance hurdle further. SID boosts performance by
exploiting one insight: existing NICs primarily rely on Queue Pair (QP)-level parallelism, but
underutilize intra-QP Work Queue Element (WQE)-level parallelism. Harnessing parallelism is non-trivial,
especially at the WQE-level, due to ordering semantics and request dispatching. The key technique is our
Elastic QP data structure built atop the on-NIC datapath processors, which realizes ordered intra-QP
parallelism while minimizing coordination overhead. Regarding flexibility, SID supports extensible
operation sets that comply with the OpenSHMEM model for ML/HPC workloads and the Message Queue model for
cloud service workloads. Regarding cost efficiency, SID is built on top of commodity components such as
Ethernet, PCIe, and datapath cores of NVIDIA ConnectX-8 and BlueField-3 NICs. Evaluation shows that SID
achieves up to 11.03x higher rates for small messages than RDMA-based baselines and supports both CPU and
GPU-Direct operations. Balanced
Sparse Tree: A Scalable Network Topology for Large Language Models Abstract: The development of large language models (LLMs) has
catalyzed unprecedented demand on the computing network, specifically for large-scale, few-hops, and
low-latency, which directly underpin LLM task efficiency. However, mainstream topologies such as Clos
suffer from costs and latency, while topologies with good scalability have symmetric or collective
communication issues. In order to achieve a favorable balance among design metrics, we propose a novel
topology named the Balanced Sparse Tree (BST), which is a topology characterized by symmetric design and
sparse connections, motivated by hypergraph theory and Steiner Systems. Its degree-diameter upper-bound
approaches the Moore Bound for Bipartite Biregular graphs, larger than other known dia-meter-2 topologies.
Furthermore, we incorporate differentiated routing, deadlock freedom, and topology-affined deployment into
BST. Testbed experiments, simulations, together with modeling analysis, demonstrate the superiority of BST
over the state-of-the-art in network scale, latency, bandwidth, and cost. With equivalent scales, BST
outperforms Clos with a 50% cost reduction while maintaining comparable performance for AI workloads.
Furthermore, BST delivers a 3.9%–11.8% gain in collective communications and has 13.4% improvement over
state-of-the-art topologies. Understanding and Profiling the Accelerator Chiplet Network Using PingPoint Abstract: Emerging chiplet-based accelerators introduce a new
class of intrahost networks—the Accelerator Chiplet Network (ACN)—that links compute chiplets, IO
chiplets, and memory modules and increasingly governs application performance. Yet ACN behavior remains
largely opaque: existing tools overlook on-package communication and instead attribute overheads to
compute or memory subsystems, while ACN-induced latency, bandwidth heterogeneity, and congestion are hard
to observe due to proprietary microarchitectures, tight coupling with the execution pipeline, and complex
mappings between application activity and hardware. To overcome this challenge, we build an ACN
characterization framework that enables fine-grained, topology-aware probing of paths and links. We then
use it to uncover fundamental ACN performance properties on multi-chiplet GPUs. Guided by these insights,
we design PingPoint, a lightweight utility for ACN-native profiling. Our key insight is that modeling the
ACN as a logical, hose-based graph with queueing abstractions, combined with in-situ software probing,
makes systematic dissection of the otherwise opaque ACN possible. It injects latency and bandwidth probes
while co-executing target kernels, captures cycle-level link- and path-granular distributions, and applies
differential attribution to localize congestion to individual ACN links. Across diverse workloads and
hardware, it exposes hidden bottlenecks, guides kernel placement and traffic shaping, quantifies the
performance impact of ACN contention, and enables practical optimization with marginal overhead. | Experience Session 2: Content Delivery & Video Streaming Session Chair: Sanjay Rao Prefetching for Short Video Streaming: Experiences from a Longitudinal Evolution at
Planetary Scale Abstract: Short-form video streaming is characterized by
fast-paced, scrolling-driven user interactions. This poses unique challenges for its streaming algorithm
design. To our knowledge, there is little understanding of how short video streaming algorithms perform in
large-scale production platforms. To bridge this gap, this paper reports our two-year experience in
evolving the prefetching algorithm, a critical algorithmic component for short video streaming, deployed
in a leading global short video service. We adopt an iterative, production-driven approach, progressively
evolving the design from simple heuristics to optimization-based and data-driven algorithms, with each
iteration validated through large-scale A/B tests on hundreds of millions of users. Our evolution advances
two core components: the prefetching logic and the viewing time estimation, including a lightweight
on-device personalization mechanism. Through carefully balancing startup delay, mid-playback stalls,
bandwidth usage, runtime overhead, and estimation accuracy, we achieve a 0.38% increase in user stay time
- our key engagement metric - while simultaneously reducing bandwidth consumption by 14.7% throughout the
evolution. We distill actionable insights from real-world deployment, highlighting the importance of
startup latency, bandwidth efficiency, and low-overhead design for short video streaming at scale. Adaptive
Bitrate Live Streaming over HTTP-FLV: A Practical System Perspective Abstract: In this paper, we present the implementation and
deployment experience of adaptive bitrate live streaming over HTTP-FLV in TikTok Live. HTTP-FLV does not
divide media streams into separate segments as in segment-based streaming protocols such as HLS and DASH.
As a result, the dominant client-side ABR control logic in existing literature induces bandwidth
contention in the process of ABR switching between the old and new bitrate variants. To validate that, we
implement both client-executed and server-executed ABR switching, and compare them through large-scale
online A/B tests. As expected, server-executed ABR switching is demonstrated to deliver better QoE. In
addition, our ABR implementation is further enhanced by general optimization schemes such as server-side
congestion control state feedback. We hope our experiences can offer insights to similar systems,
especially those using emerging streaming protocols that are actively discussed in the community. Horizon: A
Hyper-Edge Observability Engine for Live Streaming Networks Abstract: Live streaming services power mainstream real-time
interactions on top of dedicated live streaming networks (LiveNets). Yet making LiveNets reliable at scale
is challenging: failures arise on the userfacing delivery path and within streaming protocol and
application logic, so operators need both continuous runtime monitoring to detect and localize incidents
quickly and proactive preflight testing to exercise changes under representative environments and
sustained playback behavior. Meeting these goals hinges on the right vantage point: the observability
workflow must traverse the same network paths and delivery stacks as users while remaining controllable
and non-intrusive. We present Horizon, which leverages near-user, provider-managed hyper-edge devices and
orchestrates them into a shared fleet that supports both always-on monitoring and customizable,
scenario-driven validation. Horizon has been deployed in production for over three years; in 2025, it
identified 2,000+ major network incidents using 100,000+ hyper-edge agents. CacheFlare: Optimizing Cold Content Performance in CDNs Abstract: Existing research on Content Delivery Networks (CDNs)
predominantly focuses on optimizing the delivery of hot content—popular items that attract frequent and
repeated access from large user bases. However, at Meta, we have identified that cold content, which is
less popular and accessed infrequently, poses significant challenges for user experience, especially with
large volumes of direct messaging media. Through extensive analysis of Meta's CDN data, we quantify
the impact of cold content performance on user experience and reveal substantial differences across
geographic regions. Motivated by these findings, we propose CacheFlare, a suite of production-deployed
solutions designed to enhance Quality of Experience (QoE) by increasing CDN hit rates for cold content.
Through experiments and production validation, we show that even cold content can benefit from improved
caching strategies, yielding up to a 10% improvement across a range of network performance metrics. |
| 3:10 pm – 4:20 pm | |
|---|---|
| Track A | Track B |
Experience Session 3: Diagnosis & Root-Cause Analysis Session Chair: Dan Pei Evolution
of AliYANG: Model-driven and LLM-assisted Network Configuration Management Abstract: Configuration management in large-scale cloud networks
is increasingly challenging due to vendor heterogeneity, diverse configuration interfaces, and rapid
configuration evolution across the network life cycle. Existing approaches rely heavily on vendor- and
interface-specific templates and scripts, which are difficult to validate, costly to maintain, and scale
poorly. We introduce AliYANG, a YANG-based configuration modeling framework that unifies configuration
representation across vendors and management interfaces. It extends YANG to capture CLI semantics and
derives a vendor-agnostic core model that separates configuration semantics from vendor-specific
implementations. We further present NetCMDB, the production software infrastructure for AliYANG, which
compiles models into typed configuration objects and supports end-to-end, model-driven configuration
workflows. As networks evolve, manually constructing and maintaining models becomes a bottleneck. We
incorporate LLM-assisted automation to facilitate vendor model augmentation, core model design, and
bidirectional translation code generation. We report our three-year production deployment experience
managing hundreds of thousands of devices, present evaluation results and case studies, and share lessons
from operating a model-driven configuration system at cloud scale. Networked
Agent Memory and Causality Representation: Experiences towards Interpretable Cloud-Scale
Root-Causing Abstract: Root-causing is critical yet labor-intensive in
cloud-scale network operations. However, existing solutions struggle to adapt to unforeseen failure modes
and large-scale incidents with limited agent memory. Their black-box output explanation also fails to
provide the verifiable interpretability required for operator trust. In this paper, we present XiHe, a
novel multi-agent framework designed to address these challenges. XiHe employs guided evidence-driven
agents to decompose diagnostic tasks, utilizes networked agent memory to share global context without
saturating memory, and leverages networked causality representation to synthesize transparent, verifiable
causal graphs. XiHe has been deployed in our global cloud infrastructure for 12 months, assisting with
over 3,000 incidents, reducing operator root-causing time by 25.8% and garnering a 95.1% satisfaction
rate. XiHe also achieves an overall accuracy of 94.6%, a 54.9% mistake reduction compared to the
state-of-the-art methods. Detection
and Localization of End-to-end Bitflip Errors in Data Centers Abstract: Packet corrupting devices can cause bitflips and data
corruption, and, depending on exactly where the corruption occurs, can evade even strong link-level
checks. Even though such instances are probabilistically rare, they are all too common at hyper-scale. At
Meta, they have been causing end-to-end errors for years in our datacenter fleet, resulting in dozens of
instances of performance impact to services, and rare instances of data corruption. Over the years, we
have developed three tools that have progressively improved our ability to localize this problem to
specific hosts, rack switches, links, and even specific ports on those switches. They include a fleet wide
passive monitoring service to track Layer-4 checksum errors detected by hosts, an active monitoring and
fault localization system to probe for corruption on devices and localize them to individual links at any
layer of the topology; and a loopback test to reproduce and confirm packet corruption on specific ports on
localized switches. Together, they comprise Flipperino, a system that detects and localizes packet
corrupting devices, making it easy to identify them for remediation. We share our experience from
investigations, and recent results from Flipperino, which has localized devices causing 97% of Layer-4
checksum errors. We have also reproduced corruption on 8 switches in the last 3 months, including 7 rack
switches and a fabric switch. Anytest:
Localizing the Root Cause of Hardware Transport Performance Anomalies Abstract: RoCEv2-based RDMA fabrics are the backbone of modern
high-performance data-center workloads, yet large-scale deployments increasingly suffer transport-layer
network performance anomalies (NPAs) such as throughput collapse, persistent unfairness, and latency
inflation even without link failures. Localizing root causes of NPAs is one of today's hardest
operational challenges: RoCEv2 transport logic is offloaded into proprietary NIC/switch hardware with
limited observability; available counters miss μs-scale dynamics; and similar symptoms can originate from
sender, receiver, or switch behaviors in the tightly coupled RoCEv2 system. We present Anytest, an in-situ
black-box testing tool that localizes root causes of transport-layer NPAs on commodity RoCEv2 RNICs and
Ethernet switches without re-cabling or hardware modification. Anytest decomposes RoCEv2 network system
into logical roles and isolates the hardware under test by emulating the other roles with protocol-correct
DPDK endpoints. This enables deterministic injection of transport events and μs-resolution measurements.
We overcome non-trivial technical challenges to implement Anytest's DPDK-based endpoints, which
realize protocol correctness while enforcing μs-level packet timing at the hardware line rate. Integrated
into a trace-reproduce-localize workflow, Anytest has been deployed in production for ~1 year, reducing
mean localization effort to 3.1 person-hours. | Experience Session 4: Cloud Data Planes & Network Virtualization Session Chair: Xiaoqi Chen Rules
Offload Engine (ROE): Accelerating Host SDN Policy Evaluation Abstract: Software Defined Networking (SDN) policy evaluation
analyzes and verifies network rules to enable accurate packet routing, manage access controls, and ensure
security and privacy. Therefore, SDN policy evaluation is a mandatory step that each network packet must
go through in virtual machines hosted on public cloud services, such as Azure. Evaluating SDN policies
requires up to several hundred microseconds, which severely limits performance. The problem exacerbates at
cloud scale where more connections per second (CPS) are desirable across millions of virtual machines. In
this paper, we present Rules Offload Engine (ROE), a hardwaresoftware co-designed solution that
accelerates SDN policy evaluation through FPGA-based SmartNICs. We propose the ROE Instruction Set
Architecture (RISA) that features dedicated networking-friendly instructions. RISA fuses control policy
data and operation directly into the instructions to facilitate an efficient FPGA implementation. We
develop an ROE compiler that translates SDN rules into RISA instructions. We also design the ROE-Core that
implements RISA and other components for seamless integration with existing hardware and software stacks.
Overall, ROE enables up to 400K CPS, achieving 10× higher throughput compared to prior
software-centric approaches. ROE is deployed in Azure and was featured as a part of the second-generation
Azure Boost. Spillway:
Orchestrating DPU and Host into a Unified vSwitching Fabric Abstract: The transition to Data Processing Unit (DPU)-centric
architectures has become the de-facto standard in modern cloud networks, enabling infrastructure offload
and improved host resource utilization. However, the fixed hardware limits of DPUs increasingly fail to
keep pace with the rapid growth of host compute density and network-intensive workloads. As a result, when
DPU resources are saturated, host compute capacity often remains underutilized due to insufficient network
provisioning. This paper presents Spillway, a unified vSwitching fabric that decouples virtual switching
capacity from static DPU hardware limits. Spillway introduces a DPU-host hybrid data plane that repurposes
idle host CPU resources to process spillover traffic when the DPU becomes the bottleneck. Unlike
traditional software switching, Spillway activates host-based forwarding selectively through a unified
resource scheduler, incurring no overhead under normal operating conditions. To ensure production
viability, Spillway enforces strict performance isolation across heterogeneous data planes. Experimental
results from a large-scale deployment show that, under bursty traffic workloads, Spillway improves
single-node connection processing capacity by up to 90% with negligible interference to co-located
applications. From
Nimitz to NetPila: The Evolution of Production-Scale Container Network Abstract: This paper describes two generations of production
container networks deployed for over five years. Our first-generation network, Nimitz, used VxLAN for
overlay-underlay mapping, providing flexibility and scalability from 2019-2022. However, with the rise of
large-scale services (e.g., AI training and inference), Nimitz hit the C100K problem: beyond O(100K)
containers, address mapping overhead and complex packet processing caused significant performance
degradation. To overcome this, we built NetPila, a second-generation design that uses simple, practical
IPv6 addressing to remove VxLAN encapsulation and overlay-underlay mapping tables. By embedding container
addresses in the 128-bit IPv6 space, NetPila integrates the container network with the physical network,
reducing packet-processing complexity and improving scalability. NetPila now supports millions of
containers per tenant for production AI training and inference. We present the design, lessons, and
deployment results of both generations. Open the
Floodgates in a Digital Twin: Experiences of Building Spillway for 100M+-User Signaling Storms in
Cellular Core Network Abstract: Signaling storms threaten cellular core networks when
synchronized reconnection attempts from massive numbers of devices trigger cascading, metastable
overloads. Existing defenses rely on manual, static configurations of local overload controls, which
ignore serial dependencies among heterogeneous network elements. We present Spillway, a
digital-twin-driven system that automates global signaling-flood mitigation. Spillway introduces a
hierarchical defense architecture that enforces altruistic throttling, allowing upstream nodes to shed
load before downstream bottlenecks collapse. To evaluate candidate configurations, Spillway uses CN-DES, a
domain-specific discrete-event simulator with a vectorized kernel. By aggregating users that share
protocol states, CN-DES decouples simulation cost from user count and simulates regional-scale storms
involving tens of millions of users in minutes, achieving a 60× speedup over traditional simulation
while preserving fidelity. Spillway then uses heteroscedastic evolutionary Bayesian optimization to search
a large, non-convex parameter space. We report on a five-year deployment in the world's largest 5G
Standalone network. During real incidents, including application anomalies and RAN failures, networks
using Spillway-optimized configurations experienced substantially fewer user fallbacks than predicted
under legacy configurations; post-incident analysis confirms that pre-deployed parameters kept all network
elements within safe operating bounds. |
| 4:20 pm – 5:30 pm | |
|---|---|
Posters/Demos |
Thursday, August 20
| 9:00 am – 10:25 am | |
|---|---|
| Track A | Track B |
Research Session 9: Optical & Photonic Fabrics Session Chair: Alex Snoren λλ: A Programming Language for Silicon Photonics Abstract: We present λλ1, a programming language for silicon
photonics. λλ uses a linear type system to encode the physical constraints of optics, rejecting
unrealizable programs at compile time. The compiler lowers well-typed programs to a graph-based
intermediate representation, then solves a constrained embedding problem to map these graphs onto
arbitrary silicon photonic switch targets while minimizing signal loss. We validate λλ on a commercial
photonic switch, demonstrating correct operation for circuit switching, time-varying rotor switching and
analog in-network computation. Across various hardware targets and programs, the λλ compiler scales to
silicon photonic switches with over 100,000 programmable elements and handles switch programs with 128
input-output pairs. Finally, we develop a synthesizer to automatically generate λλ programs from
high-level specifications, allowing users to program photonic hardware without reasoning about optical
primitives. Opus:
Photonic Rail-Optimized Fabric in ML Datacenters Abstract: Rail-optimized network fabrics have become the de
facto data-center scale-out fabric for large-scale ML training. However, the use of high-radix electrical
switches to provide all-to-all connectivity in rails imposes substantial power and cost. We propose a
rethinking of the rail abstraction by retaining its communication semantics, but realizing it using
optical circuit switches. The key challenge is that optical switches support one-to-one connectivity at a
time, limiting the fan-out of traffic in ML workloads using hybrid parallelisms. We overcome this through
parallelism-driven rail reconfiguration, which exploits the non-overlapping communication phases of
different parallelism dimensions. This time-multiplexes a single set of physical ports across circuit
configurations tailored to each phase within a training iteration. We design and implement Opus, a control
plane that orchestrates this in-job reconfiguration of photonic rails at parallelism phase boundaries, and
evaluate it on a physical OCS testbed, the Perlmutter supercomputer, and in simulation at up to 2,048
GPUs. Our results show that photonic rails can achieve over 23× network power reduction and 4×
cost savings while incurring only modest training overhead at production-relevant OCS reconfiguration
latencies. Special Session 1: Best of Networking Session Chair: Kai Chen APNet Rising Star When the
Lights Go Out: Internet Resilience During the 2025 Iberian Power Outage Abstract: On April 28th, 2025, a major power outage caused a
disruption of electric service across Spain and Portugal, lasting about ten hours in most regions and even
longer in some areas. We analyze the impact of the power outage, showing how it led to a
near-instantaneous 33–70% drop in traffic at 4 major Iberian IXPs, while core infrastructure remained
largely functional. We show that the Internet was impacted by a second event: a partial outage in a data
center that resulted in a second drop of traffic and BGP sessions. Contiguous
Zero-Copy for Encrypted Transport Protocols Abstract: We propose in this paper to revisit the design of
existing encrypted transport protocols to improve their efficiency. We call the methodology "Reverso" from
reversing the order of field elements within a protocol specification. We detail how such a benign-looking
change within the specifications may unlock contiguous zero-copy for encrypted protocols during data
transport. To demonstrate our findings, we release quiceh, a QUIC implementation of QUIC VReverso, an
extension of the QUIC V1 standard (RFC9000). Our methodology applied to the QUIC protocol reports ≈ 30% of
CPU efficiency improvement for processing packets at no added cost on the sender side and without relaxing
any security guarantee from QUIC V1. We also implement a fork of Cloudflare's HTTP/3 module and
client/server demonstrator using quiceh and show our optimizations to directly transfer to HTTP/3 as well,
resulting in our new HTTP/3 to be ≈ 38% more efficient than the baseline implementation using QUIC V1. We
argue that Reverso applies to any modern encrypted protocol and its implementations and that similar
efficiency improvement can also be unlocked for them, independently of the layer in which they operate.
Indeed, this research shows that the ability to implement contiguous zero-copy on the receiver side
inherently depends on the specified encrypted protocol wire image, and that we may need to reverse how we
are used to write them. | Research Session 10: Internet Measurement & Routing Session Chair: Arvind Narayanan OmniPath
Ping: Active Network Measurement in the Era of Packet Spraying Abstract: Ping and Traceroute constitute the fundamental toolkit
for network monitoring. Built upon these primitives, initial active probing systems focus on achieving
sufficient coverage of switches and links. To further diagnose subtle failures (e.g., misconfigurations)
affecting specific service flows, recent systems have proposed service tracing to measure their
connectivity and performance. These systems operate effectively under the widely adopted flow-level LB
scheme (i.e., ECMP), which binds each flow to a deterministic path. However, the paradigm shift towards
packet-level LB (e.g., packet spraying) in next-generation networks invalidates this foundation. By
dispersing packets of a single flow across multiple paths, packet spraying causes traditional primitives
to suffer from path ambiguity in failure localization and incurs prohibitive overhead for full path
coverage. In this paper, we propose OmniPath Ping (OPP), the first diagnostic primitive designed for
service tracing under packet spraying. OPP overcomes these challenges through a switch-host co-design
featuring two key techniques: (1) an in-network OmniPath cache that captures per-hop telemetry to resolve
path ambiguity; and (2) in-network duplication and deduplication mechanisms that enable full path coverage
with zero redundancy. To further ensure scalability for network-wide service tracing, OPP incorporates (3)
a topology-aware concurrency control mechanism to balance OmniPath cache SRAM usage and probe timeliness.
Extensive results demonstrate that OPP achieves 10 ms-level service tracing with full path coverage at
minimal host and network overhead, requiring only 181 KB of switch SRAM. HERMES:
Repurposing User-Driven Speed Tests to Monitor the Internet Abstract: Diagnosing performance degradations and pinpointing
their source is crucial for operators to make informed routing decisions and for policymakers and
researchers to assess the Internet's stability, yet no publicly available observatories currently
provide this capability. Existing solutions rely on coarse-grained signals that fail to capture end-user
performance, while proprietary solutions are inaccessible and offer limited attribution for identifying
the source of a problem. We introduce HERMES, the first open system to fill this gap. HERMES uses publicly
available M-Lab speed tests—data that has existed for years but has not previously been used to
automatically detect and explain end-user performance degradations at scale. To achieve these goals,
HERMES combines statistical techniques to detect performance degradation with novel tomography methods and
forward and reverse path measurements to localize the source of a problem. Despite relying only on public
data, HERMES matches a reimplementation of a large cloud provider's monitoring system for 94.5% of
events visible to both systems, agreeing on the degradation source in the path. HERMES also surfaces
11× more publicly discussed events than existing public observatories. We demonstrate its ability to
track weather- and cable-cut disruptions, diagnose routing inefficiencies, and identify persistently
congested links. A Global
Inference and Assessment of Large Shared IP Addresses Abstract: The number of clients and users behind an IP address
can differ by orders of magnitude, owing to large shared IPs such as VPNs, proxies, and Carrier-Grade NAT
(CGN) gateways. However, limitations on visibility, the absence of Internet-wide data, and the dynamic
nature of IP allocations make it difficult to disambiguate multi-user IPs (M-IPs) and their impact on
service provision. In this paper we devise an inference technique to detect M-IPs. We train a classifier
by annotating data from public sources with features extracted from a global CDN request log. To
demonstrate reproducibility, we build a parallel model using public M-Lab data and achieve comparable
accuracy with different features. An unanticipated result was the dominance of /24 feature importance over
individual IPs. Using the CDN logs, we then evaluate implications of CGNs along multiple dimensions
including user impact, relationship with IPv6 networks, and regional distributions. Our results reinforce
various intuition, and potentially challenge some assumptions. LARS:
Keeping Local Traffic Local with Latency-Aware Route Servers at IXPs Abstract: Internet Exchange Points facilitate traffic exchange
through Route Servers that use BGP for path selection without considering latency. This paper presents
LARS, the first system to enable latency-aware path optimization at IXP route servers. It requires no
changes to BGP and no bilateral coordination among members, thus directly enabling latency-aware routing
for all IXP members. LARS continuously probes the route-server RIB, annotates routes with RTT-derived BGP
communities, and enables members to (i) enforce a configurable latency radius that suppresses high-latency
routes and (ii) prefer lower-latency alternatives when multiple paths exist. We evaluate LARS at a very
large IXP using a production-level prototype that demonstrates stable latency estimation, effective
tail-latency control via selective redistribution, and potential to optimize BGP best paths. Near-optimal Online Traffic Engineering Abstract: Most deployed WAN Traffic Engineering (TE) systems use
a logically centralized controller that periodically gathers traffic demands, runs a TE optimization or
heuristic, and then programs the network. At scale, these solutions are often suboptimal and can take
minutes to react to demand changes or failures. In this paper, we introduce OnlineTE, a system that reacts
immediately to demand changes and failures and delivers near-optimal solutions within seconds of a change.
OnlineTE builds on the theory of optimization decomposition to devise scalable, near-optimal, distributed
TE solvers for path-based MLU and Max-Flow problems. In OnlineTE, switches each solve a local subproblem,
and a central coordinator coordinates their convergence. As such, a switch can trigger a re-optimization
as soon as it detects a demand change or failure, enabling high reactivity. OnlineTE scales to large WANs,
and its computational requirements are well within the capabilities of modern WAN switches. It also
enables a novel paradigm, edge-based TE, which can utilize resources more efficiently than today's
path-based approaches. On a testbed emulation of a 750-node WAN topology, OnlineTE outperforms the
state-of-the-art by up to an order of magnitude. |
| 10:50 am – 12:15 pm | |
|---|---|
| Track A | Track B |
Research Session 11: Scheduling for ML Training Clusters Session Chair: Pooria Namyar MonkeyTree: Near-Minimal Congestion for Multi-tenant Training via Migration Abstract: We present MonkeyTree, the first system to mitigate
network congestion in multi-tenant GPU clusters through job-migration based defragmentation rather than
network-layer techniques. As cloud operators co-locate ML training jobs on shared, oversubscribed
networks, congestion degrades training throughput for over a third of jobs. Prior approaches either rely
on routing and flow scheduling—which we show have fundamental limits when traffic exceeds capacity, or
require costly full-bisection bandwidth topologies with packet spraying. MonkeyTree exploits
characteristics of ML training traffic: ring-based collectives generate exactly one cross-rack flow per
rack a job spans, making congestion-free placements achievable. The sparse constraint structure admits
abundant valid configurations, making them easy to reach with few migrations. Once reached, low
fragmentation is self-reinforcing, as new arrivals disturb only a few racks. MonkeyTree formulates
defragmentation as an integer linear program that minimizes worker movements, subject to per-rack
fragmentation bounds. We prove a tight bound showing any placement can be defragmented to at most two
cross-rack fragments per ToR, and extend the formulation to hybrid parallelism with multiple rings per
server. Migration is implemented via in-memory checkpoint-and-restore over RDMA, incurring only 9.02
seconds of system overhead end-to-end per worker. We evaluate MonkeyTree using a custom simulator modeling
clusters of up to 2,048 H200 GPUs and prototype on a five-node A100 testbed. MonkeyTree improves average
job completion time by 14% over the next best baseline on a cluster of 1,024 GPUs with a 4:1
oversubscription. With a high 16:1 oversubscription ratio and 2,048 GPUs, MonkeyTree keeps p99 job
completion time within 5% of ideal. Aegis:
Contract-Bounded Online Adaptation for Networked Accelerator Clusters Abstract: Accelerator clusters generate bursty network traffic:
distributed training exchanges gradients via all-reduce, inference pipelines fan out requests, and storage
competes with latency-sensitive RPCs. Poor placement amplifies congestion: a mis-scheduled training job
can raise ECN mark rates by 3× and inflate co-located service tail latencies by 40%. Yet schedulers
ignore real-time fabric state. We present Aegis, a scheduler that adapts placement using live fabric
telemetry under operator-defined contracts. Aegis ingests per-ToR queue depths and ECN counters at
1-second granularity, incorporates a congestion-pressure term into placement scoring, and evolves online
via a conservative bandit with exposure control. Contracts on tail latency, fairness, and congestion
compile into safety envelopes that gate rollouts and trigger automatic rollback. We evaluate Aegis on an
80-node cluster (160 A100-80GB GPUs, 160 TPU v4 chips, 2-tier Clos fabric). Under production-derived
workloads, Aegis reduces service p99 RPC latency by 27.3% (152.4 ms vs. 209.6 ms), cuts SLO violations by
3.6×, and lowers ECN mark rate by 51% while improving utilization from 68.4% to 79.1%. These gains
hold under workload shifts and telemetry delays up to 60 seconds. The design is scoped to shared clusters
where placement can materially reshape fabric contention. LEVELLER:
Fair Communication Scheduling via Progress-Rate Awareness in Multi-Tenant Training Clusters Abstract: The rapid expansion of Large Language Models (LLMs)
has established Deep Learning Training (DLT) as a major workload in modern multi-tenant GPU clusters.
While fair computational scheduling is well-studied, fair communication scheduling in handling
execution-time network contention remains underexplored. Current DLT communication schedulers focus
primarily on efficiency-oriented objectives, often causing disparate performance degradation or even job
starvation when concurrent jobs compete for shared bandwidth. In this paper, we propose LEVELLER, the
first communication scheduling system that achieves max-min fairness specifically for DLT workloads. To
bridge the gap between traditional flow-level fairness and DLT job-level fairness, LEVELLER introduces a
novel online metric, normalized progress rate, which quantifies training experience by measuring actual
progress against a contention-free ideal. We theoretically prove that a greedy, progress-rate-aware flow
scheduling strategy achieves at least a 1/2-approximation of max-min fairness for arbitrary workloads,
even with lazy priority updates. Building on theoretical results, LEVELLER employs preemptive,
dynamic-priority scheduling to achieve near-optimal fairness on commodity infrastructure without hardware
or protocol modifications. We prototype LEVELLER on both RDMA and TCP, evaluating it through a physical
GPU cluster and trace-based simulations. Experimental results on 10 LLMs show that LEVELLER improves the
minimum progress rate by 57% and fairness by 17% compared to state-of-the-art solutions (including
CASSINI, CRUX, Symphony and Sincronia), while maintaining competitive cluster efficiency. GeoOrchestra: Orchestrating Heterogeneous Geo-Distributed Training with Network-Aware
Scheduling Abstract: Scaling Large Language Models (LLMs) increasingly
mandates the aggregation of geographically dispersed resources. However, cross-datacenter (Cross-DC)
training faces significant hurdles due to extreme hardware heterogeneity and limited Wide-Area Network
(WAN) bandwidth. Empirical measurements on a 2,000 km Cross-DC testbed reveal that the interplay of
hardware mismatches, combinatorial search complexity, and shared network contention creates severe
performance bottlenecks for heterogeneous training. To address these complexities, we propose
GeoOrchestra, a system that decouples resource filtering from fine-grained strategy search. By abstracting
compute nodes via computation and memory profiles while modeling WAN links as a virtual hard pipe,
GeoOrchestra deconstructs the parallel strategy search problem into three cascading stages. Specifically,
it employs hetero-aware pruning to filter invalid resource sets, followed by a resource-driven search that
exploits resource disparities to maximize efficiency. Finally, the system orchestrates training traffic
via dynamic time-slot slicing to enforce lower-bound bandwidth guarantees for individual jobs. Evaluations
on our testbed demonstrate that GeoOrchestra achieves up to 1.6× to 1.8× throughput improvement
over state-of-the-art baselines, while maintaining stable execution under real-world shared WAN
contention. Dynamic
Compute and Network Orchestration for Disaggregated RL Abstract: Disaggregating the generation and training stages in
RL is widely adopted to scale LLM post-training. There are two critical challenges here. First, the
generation stage often becomes a bottleneck due to dynamic workload shifts and severe execution
imbalances. Second, the decoupled stages result in diverse and dynamic network traffic patterns that
strain the conventional static fabric. We build Silverstone to orchestrate dynamically both compute and
network in disaggregated RL. Silverstone employs an adaptive compute scheduler that adjusts parallelism
configuration to match changing workload characteristics within and across generation steps. Silverstone
adopts a reconfigurable optical-electrical fabric called RFabric: It leverages optical circuit switches to
reconfigure the aggregation and core layers of the topology on demand, tailoring bandwidth resources to
the unique communication patterns across various phases of training, generation, and weight
synchronization. Evaluated on a 64-H800 GPU testbed, Silverstone demonstrates up to a 1.42×
throughput improvement over static baselines. Using a high-fidelity simulator, we also show that RFabric
achieves superior performance-cost efficiency at scale over static Fat-Tree networks. | Research Session 12: Host Networking & Packet Processing Session Chair: Oliver Hohlfeld Understanding Host Network Stack Latency Abstract: One of the most frequently cited flaws of Linux host
network stacks is their high latency—recent studies show that the Linux network stack suffers from
millisecond-scale tail latency. This has motivated clean-slate solutions such as userspace stacks and
specialized host networking hardware, but without understanding the true root causes of Linux tail
latency, these efforts risk repeating the same pitfalls. This paper studies the root causes of tail
latency in the Linux network stack and reaches a surprising conclusion: the dominant bottlenecks lie not
in packet processing itself, but in how the host manages CPU resources for networking. Through extensive
measurements, we identify three key factors: misattribution of processing time by CPU schedulers,
limitations of CPU runtime as a fairness abstraction, and the inefficiency of interrupt tuning under
unpredictable packet arrivals. We show that addressing these factors improves performance by up to
5.3× while maintaining similar throughput. Together, these results suggest that achieving low-latency
networking requires rethinking host CPU scheduling and host-NIC interaction, providing new design
directions for operating systems, network stacks, and future host networking hardware. Don't
Stall Me Now: Hiding Memory Latency in eBPF Abstract: eBPF has emerged as a popular platform for building
high-performance I/O programs. However, eBPF's programming model limits the use of commonly used
performance optimizations, leaving programs vulnerable to cache-miss-induced performance overheads.
Specifically, the programming model restricts the choice of data structures used by a program, thus
limiting the programmers' ability to improve data locality. Furthermore, it also makes it hard for
programmers to overlap computation with data movement. In this paper, we present Beeswax an approach that
addresses both of these restrictions. This approach requires programmers to adopt multi-phase data
structures and partition programs into multiple stages. It overlaps the execution of program stages, and
thus hides cache miss overheads. We designed the approach so that it could be applied to existing programs
without requiring significant change. We have applied Beeswax to Katran, a load balancer deployed in
production data centers, and BMC, a key-value store accelerator. We show throughput improvements of up to
99%. PacketExpress: Fully Exploiting Large MTUs for Internet Traffic in Private
Networks Abstract: Network bandwidth continues to scale rapidly, yet
Internet data transmission performance remains constrained by the legacy 1500 B MTU. This small MTU
translates high bandwidth into high packet rates that strain CPU processing at middleboxes and end hosts.
While increasing the MTU could substantially improve performance, coordinating upgrades across arbitrary
Internet paths is impractical. This paper presents PacketExpress, a packet processing architecture that
enables networks to leverage large MTUs for Internet traffic without requiring modifications to
neighboring networks. MTU-translating gateways at network borders dynamically aggregate incoming small
packets into larger packets for efficient processing, then segment them back when forwarding externally.
We present PXIO, a packet processing stack that leverages NIC offload capabilities to achieve high
throughput. We introduce F-PMTUD, which determines the path MTU within a single round-trip time without
relying on ICMP. For UDP, we present PX-caravan, a tunneling mechanism that encapsulates multiple packets
to benefit from large MTUs while preserving packet boundaries. Our prototype achieves 1.47 Tbps throughput
with 8 CPU cores while converting over 90% of 1500 B packets into 9000 B packets, improving middlebox
performance by up to 5.1× and end-host performance by up to 2.5×. Honey, I
Shrunk the Headers With Flow.ZIP Abstract: Packet header overhead is a persistent source of
inefficiency in packet-switched networks, reducing goodput and increasing network load. Trends like
tunneling further increase this overhead, significantly impacting flow completion times. While, in
principle, it is possible to compress these headers, existing methods require specialized hardware on
every hop to compress/decompress the packet to/from custom header formats. In this paper, we present
Flow.zip, a backward-compatible header compression mechanism designed for existing data center networks.
Our solution leverages a combination of last-hop network offload and MPLS support, both of which are
ubiquitous in modern data center deployments. Flow.zip overcomes scalability limitations in these
components by selectively and intelligently coordinating compression for a subset of flows. Doing so,
Flow.zip achieves up to 58% reduction in average flow completion time on real-world data center workloads. Simplifying Prioritization and Scheduling with P2CS Abstract: Modern datacenter networks host diverse services and
workloads with varying quality-of-service (QoS) requirements, yet are constrained by hardware limitations.
Most notably, the small number of physical priority queues available in commodity switches. Existing
scheduling mechanisms, whether end-host or in-network based, struggle to scale under these constraints due
to their reliance on global priority information or complex queue management. This paper presents P2CS
(Priority-based Probabilistic Congestion Signaling), a lightweight and scalable approach that enables
fine-grained traffic prioritization using only a single FIFO queue. P2CS combines priority-aware
probabilistic congestion signaling, priority-aware packet dropping, and simple switch-side arbitration to
enforce prioritization across flows. P2CS supports a range of scheduling objectives, and requires minimal
software changes making it readily deployable in today's datacenter infrastructure. Evaluation on
representative workloads, including multi-tenant ML training, HPC, and mixed spray/ECMP traffic,
demonstrates that P2CS achieves performance comparable to in-network mechanisms while significantly
reducing complexity and cost. |
| 1:40 pm – 2:40 pm | |
|---|---|
| Track A | Track B |
| 3:05 pm – 4:30 pm | |
|---|---|
| Track A | Track B |
Research Session 13: Datacenter Transport: RDMA & Congestion Control Session Chair: Muhammad Shahbaz STORM:
Enabling Traffic Scheduling for RDMA Abstract: Remote Direct Memory Access (RDMA) is increasingly
used as a shared communication substrate across datacenter workloads with very different scheduling needs,
from request-response services and storage fan-out to AI training collectives. Proper request scheduling
can reduce communication time, but in practice, no RDMA flow scheduling is enabled in datacenters, leaving
traffic to simple fair sharing. We present STORM, a NIC-level scheduler for all types of RDMA workloads
using NIC-only information: the known RDMA request size, and per-queue-pair backlog. STORM converts these
signals into a small number of extra priority levels on the wire and prioritizes requests that are either
near completion or blocking queued dependent work. STORM requires no application hints and works with both
in-order RoCEv2 and newer RDMA stacks that tolerate reordering. We prototype STORM on an FPGA NIC with
negligible overhead. Across representative cloud and LLM training workloads, STORM reduces training
iteration time by up to 12% and reduces average and P99 flow completion slowdown by up to 90% compared to
fair scheduling. PSN-PATH:
When Multipath RDMA Meets Lossy Networks Abstract: Remote Direct Memory Access (RDMA) is widely adopted
for high-performance datacenter workloads, but its strict ordering requirement conflicts with multipath
transport in lossy networks. RDMA Network Interface Cards (RNICs) may interpret Out-of-Order (OOO)
arrivals caused by diverse path latencies as packet loss. This triggers unnecessary retransmissions,
severely degrading goodput collapse and inflating Flow Completion Time (FCT). We present PSN-PATH, a novel
RDMA protocol to distinguish packet loss from OOO and avoid unnecessary retransmission, improving goodput
and FCT of multi-path RDMA in lossy networks. PSN-PATH maps Packet Sequence Numbers (PSN) to network
paths, enabling the receiver to verify packet continuity within each mapped path and distinguish real
losses from OOO arrivals. PSN-PATH only retransmits lost packets and redirects traffic away from degraded
paths. We implement PSN-PATH on Xilinx Alveo U50 FPGA using Vitis HLS and validate it via extensive
simulation experiments. Experimental results demonstrate that PSN-PATH significantly outperforms existing
solutions, reducing FCT by 95.81%, enhancing goodput by 5.11×, and reducing retransmissions by over
99% under high-load, lossy conditions. InfiniFlow: Decoupling Virtual Channel Scalability from Buffer Requirements in Lossless
Datacenter Networks Abstract: Modern datacenters increasingly rely on Remote Direct
Memory Access (RDMA) for high throughput and low latency. To ensure lossless transmission, RDMA fabrics
employ hop-by-hop flow control at the granularity of Virtual Channels (VCs). However, multiplexing
multiple flows within the same VC couples their backpressure behavior, leading to severe congestion
spreading, degrading throughput and tail latency significantly. Existing methods try to improve isolation
by increasing the number of VCs but require per-VC buffer reservation, causing buffer requirements to
scale linearly with the number of VCs and fundamentally limiting VC scalability. We present InfiniFlow, a
credit-based hop-by-hop flow control method that supports massive VCs with a limited buffer budget via
per-port buffer sharing. InfiniFlow introduces a paradigm shift in buffer management: Upstream Allocates
Buffer for Downstream (UABD), where, for each link, the upstream scheduler maintains a per-port shared
credit pool and dynamically allocates credits to VCs. Building on UABD, InfiniFlow further incorporates a
Buffer Usage Control Protocol that enforces per-VC dynamic credit thresholds using real-time backlog
feedback to bound credit consumption and prevent buffer monopolization. With InfiniFlow, the required
buffer size per port becomes independent of the number of VCs and is instead bounded by a small budget
proportional to per-hop Bandwidth-Delay Product (BDP) (approximately 3× BDP). We implement InfiniFlow
on a Xilinx Alveo U280 FPGA and demonstrate support for over 16k VCs using only 401 KB of on-chip memory
per port while sustaining 100 Gbps line-rate transmission, achieving 512× and 1024× higher VC
scalability than CBFC and PFC, respectively. Extensive NS-3 simulations show that InfiniFlow achieves
near-optimal flow completion times under realistic workloads without relying on slow end-to-end rate
adaptation, outperforming prior hop-by-hop flow control methods and state-of-the-art congestion control
schemes. Odin:
Rethinking Congestion Control under All-to-All Traffic Abstract: All-to-All (A2A) communication dominates the training
and inference time of large language models, especially under the Mixture-of-Experts (MoE) architecture
where expert dispatch induces dense concurrent flows. We observe that A2A traffic consistently builds up
large total buffer occupancy (TBO) at switches. Analyzing the accompanying counterintuitive phenomena, we
reveal that the A2A traffic saturates ingress bandwidth, interferes with rate adjustment of congestion
control (CC) through sparse congestion signals and rate inflation, and causes ingress-egress bandwidth
mismatch. Unaware of these issues, existing CC algorithms would be easy to trigger PFC with large TBO,
suffer from ineffectual congestion response, and lead to throughput loss. Based on these insights, we
propose Odin to enhance CC under A2A traffic. Odin suppresses large TBO based on the switch-level TBO
signals, proactively allocate ingress bandwidth to eliminate rate inflation, and make bandwidth
compensation for ingress-egress matching. Experiments and simulations show that Odin achieves low TBO and
high throughput under A2A traffic, accelerating the training process. Meanwhile, it keeps strong
performance under non-A2A traffic. CSIG:
Congestion Signaling for Datacenter Transports Abstract: Optimizing burst-heavy datacenter workloads
necessitates finegrained network control and visibility. We introduce CSIG, a protocol that delivers
precise, multi-bit bottleneck congestion signals via a fixed-length Ethernet header. The architecture
captures μsgranularity switch metrics, such as available bandwidth, and signals them to end-hosts using
in-band, line-rate operations. We propose Fast Ramp-Up, a congestion control primitive that leverages
these bottleneck signals to reduce median RPC latency by 20% and unclaimed bandwidth by 60% in production.
Beyond transport-level performance, CSIG enables flow-aware observability by embedding μs-scale metrics
into every packet, allowing individual application transfers to pinpoint their bottleneck location, such
as the topology tier limiting their performance. CSIG thus transforms network telemetry from post-hoc
correlation into a real time, context-aware capability. We demonstrate CSIG's broad deployability by
validating it across five generations of commodity switch hardware (up to 102.4 Tbps), four NIC
generations, and five transport stacks. Our design proves that a streamlined Layer 2 approach, focusing
exclusively on the principal path bottleneck, provides transport-agnostic gains without requiring forklift
hardware upgrades. | Research Session 14: Security, Privacy & Networked Systems Session Chair: Vyas Sekar Towards
High-Performance Intrusion Detection with Robustness Guarantees on Programmable Switches at ISP
Scale Abstract: In order to provide security connections to the
enterprise campus sites, internet service providers are offering comprehensive intrusion detection
services at the network layer. However, existing network intrusion detection systems (NIDS) are either
ineffective or inefficient for high-speed network protection, especially for encrypted traffic analysis.
In this paper, we design and implement SiteGuard, an inline network intrusion detection system with
programmable switches specifically developed to protect enterprise campus sites connecting to ISP.
SiteGuard proposes a dual-plane feature extraction model to extract extensive traffic features at near
line-speed. SiteGuard also proposes a lightweight one-class classification model that trains the best
parameters exclusively on benign traffic to identify malicious traffic. In addition, SiteGuard introduces
an online update mechanism that aims to dynamically adjust the detection model in response to
environmental changes. SiteGuard has been in production for more than three years. Our production and
testbed evaluations demonstrate SiteGuard can detect malicious traffic with approximately 90% accuracy in
minutes. Zero-Knowledge Cloud Analytics Abstract: We present zk-Analytics, a distributed cloud analytics
system that enables publicly verifiable analytics without revealing raw logs or relying on trusted
hardware in analytics providers' infrastructure. Today's cloud analytics are largely
self-assertive: providers collect telemetry, perform aggregation, and report results, leaving external
parties unable to verify correctness without access to sensitive data or trusted execution environments.
zk-Analytics addresses this gap by augmenting analytics pipelines with lightweight append-only log
commitments and verifiable aggregation and query execution using zero-knowledge proofs. The system cleanly
separates online log commitment from offline, distributed batch aggregation and query verification,
enabling scalability while keeping online overhead low. We implement zk-Analytics using a zkVM-based
execution environment and evaluate it on real-world and synthetic workloads, demonstrating that
verifiable, privacy-preserving cloud analytics is feasible for real-world cloud workloads. zk-Analytics is
open-sourced at https://github.com/Froot-NetSys/zk-Analytics. DeepSFU:
Scalable Deepfake Detection for Video Conferencing Abstract: Deepfakes have emerged as a significant threat to
online communications, enabling nearly indistinguishable impersonation of executives, public figures, and
trusted contacts during video calls. While state-of-the-art deepfake detection models can achieve high
accuracy offline, deploying them in real-time video conferencing systems remains challenging: the added
computation quickly violates interactive latency budgets and greatly limits scalability. Our empirical
analysis reveals that video decoding and frame movement dominate the detection pipeline, together
accounting for approximately 86.6% of per-frame processing time. In this paper, we present DeepSFU, a
novel video conferencing architecture that enables scalable deepfake detection as a native capability.
DeepSFU reduces per-frame overhead by detecting anomalies directly on the encoded video bitstream,
avoiding costly high-resolution video decoding and heavy detection model inference. To further improve
scalability, DeepSFU offloads frequent packet encryption and data movement to Smart Network Interface Card
(SmartNIC) by leveraging hardware-accelerated cryptography and GPUDirect RDMA. Intensive evaluation on a
large-scale testbed shows that DeepSFU reduces per-frame processing latency by 143.7×, translating
into 26.2× higher conferencing capacity while providing continuous deepfake detection for all
participants. Integrating 2PC with Consensus for Fast Replication Abstract: Fast consensus protocols, such as CURP-Q and NOPaxos,
have coupled objectives of reducing latency and tolerating faults, but doing so incurs considerable
processing overhead and/or necessitates complex changes to existing architectures. Our insight is that
when no adverse execution conditions (including operation conflicts, node failures, and network failures)
occur, replication can be done safely without consensus at all. Rather than pursuing one single consensus
protocol for fast and fault-tolerant replication, we propose to decouple low latency from fault tolerance,
and design a hybrid solution that seamlessly integrates client-coordinated two-phase commit (2PC) with
consensus, respectively to reduce latency in normal situations and tolerate faults in faulty situations.
In the absence of faults, the system enters the Fast mode, where the client directly broadcasts its
requests to all replicas with 2PC completing all updates in the first phase, i.e., in one RTT. Otherwise,
the system enters the Consensus mode, which resorts to a consensus protocol to tolerate faults. We have
applied the hybrid solution to the widely-used Raft consensus protocol to design xRaft, which can
adaptively switch between the Fast and Consensus modes, ensuring correctness with minimal switching
overhead. Evaluation shows that xRaft significantly outperforms state-of-the-art consensus protocols. Tuning
into the Web: A Low-Cost Access Solution for Developing Countries Abstract: Over a quarter of the global population remains
without access to the Internet in 2026, primarily due to cost and limited infrastructure in developing
regions. This gap is becoming more consequential as access to information increasingly depends on AI
systems that presume reliable, high-bandwidth connectivity. In response, we present WebFM, a low-cost,
scalable Web and AI access solution that builds on widely deployed infrastructure in developing regions:
FM radio for downlink broadcasting and SMS for personalized uplink. Prior work on web-over-FM is limited
to simulations, short-range experiments, and lossless links, leaving the effects of geographically induced
signal variability largely unexplored. WebFM addresses this gap through several system-level innovations
to effectively transmit Web content and enable LLM interactions over sound over FM radio, in a reliable
and compressed form. For example, we introduce a loss-resilient file format for encoding webpages and
modify Android to leverage built-in FM tuners, allowing deployment across a wide range of devices without
requiring root access. We enable ChatGPT interactions by allowing users to submit prompts over SMS and
receive model responses via FM broadcast. Finally, we preemptively transmit popular pages and a subset of
their internal pages while the server is idle, improving user experience during peak hours. We deployed
WebFM at an FM radio station in Cameroon for six weeks with 30 participants. Our evaluation shows a
sustained downlink throughput of 10 kbps, less than 20% loss for most transmissions with signal strength
above -90 dBm, and strong user engagement across both web browsing and ChatGPT interactions. |
| 4:40 pm – 5:40 pm | |
|---|---|
Student Research Competition |
Friday, August 21
| 8:30 am – 9:55 am | |
|---|---|
| Track A | Track B |
Research Session 15: Programmable Switches & Data-Plane Hardware Session Chair: Shir Landau Feibish Presto: A
Match-Action TCP Stack for the Terabit Era Abstract: We present Presto, the first TCP stack that delivers
ASIC-class performance and energy efficiency on programmable Reconfigurable Match-Action Table (RMT)
pipelines, providing flexibility while retaining standard TCP semantics and POSIX socket compatibility.
The key challenge in designing Presto is reconciling TCP's complex, dependent state updates with
RMT's unidirectional, lock-step execution model. To overcome this challenge, Presto introduces three
novel techniques: optimistic concurrency (speculative updates validated downstream), pseudo-segment
injection (circular dependency resolution without stalls), and bump-in-the-wire processing (singlepass
segment handling). Together, these enable TCP retransmission, reassembly, flow, and congestion control, as
a pipeline of simple match-action operations. Our Intel Tofino 2 prototype demonstrates Presto's
scalability to terabit speeds, flexibility, and robustness to network dynamics. Presto matches RDMA
performance and efficiency for both RPC and streaming workloads (including NVMe-oF with SPDK), while
maintaining TCP/POSIX compatibility. Presto saves up to 16 host CPU cores versus state-of-the-art
kernel-bypass TCP, while achieving 5× lower 99.99p tail latency and 2× better
throughput-per-watt for key-value stores. At scale, Presto drives nearly 1 Bpps at 20 μs RPC tail latency.
Unlike fixed-function offloads, Presto supports transport evolution through in-data-path extensions
(selective ACKs, congestion control variants, application co-design for shared logs). Finally, Presto
generalizes to FPGA SmartNICs, outperforming Tonic's monolithic design by 3× under equal timing. OBM:
Optimal Shared Packet Buffer Management in Switches Abstract: To better utilize the switch memory for packet
buffering, the packet buffer in datacenter switches is shared across all switch ports. As a result, the
buffer sharing algorithm is extremely critical to the performance of datacenter switches and networks.
Previous work has shown that push-out algorithms for buffer sharing achieve much higher throughput than
drop-tail algorithms. However, switches today still implement drop-tail algorithms, as it is extremely
challenging to implement push-out operations at the line rate of datacenter switches. In this paper, we
present OBM, a new system for managing shared packet buffers in network switches based on the best-known
online push-out algorithm for buffer sharing called the Longest Queue Drop (LQD). OBM makes two key
contributions. First, OBM extends the classic LQD algorithm by making it priority-aware for packet
admission and push-out, without sacrificing LQD's throughput guarantee. Second, OBM makes LQD-based
push-out practical to implement on modern switches, by proposing a novel hardware pipeline and tree-based
switching interconnect that can perform push-out operations at line rate with low latency and low hardware
resource usage. We synthesize the OBM's design on both an FPGA and an ASIC compiler. Our prototype of
the OBM switch is both high performance and consumes nominal hardware resources. Using large-scale network
simulations, we show that OBM not only significantly outperforms state-of-the-art drop-tail and push-out
buffer management schemes, but also matches the performance of ideal albeit impractical LQD for a single
priority class while significantly outperforming it for multiple priority classes. Scale-up
PIFO: Interleaving Multiple Priority Queues for High Speed Programmable Scheduling Abstract: Push-In First-Out (PIFO) offers a unified abstraction
for rapidly deploying diverse scheduling algorithms on the same hardware. As SerDes-lane aggregation
pushes port rates to 1.6 Tbps, the perpacket processing budget is at a sub-nanosecond scale, making
single-queue PIFO designs fail to keep up. Mirroring lane aggregation, we advocate interleaving multiple
PIFO queues. However, simple round-robin parallelization introduces substantial scheduling error, and in
the worst case, it can grow to the order of the buffer size. We propose Scale-up PIFO, which expands
throughput while bounding scheduling error in a hardware-friendly manner. The key observation is that the
round-robin dequeue mechanism mis-orders packets when rank-similar packets concentrate in a single PIFO.
Scale-up PIFO thus introduces the Rank Range Load Balancing algorithm, partitioning the rank space into
ranges, distributing packets within each range evenly across parallel PIFO queues, and dynamically
adapting boundaries to the traffic pattern. We built an FPGA prototype and synthesized Scale-up PIFO in a
28 nm ASIC process. Scale-up PIFO can aggregate up to 8 PIFO queues and provide 1.6 Tbps throughput.
Packet-level simulations show significant reductions in scheduling error and short-flow Flow Completion
Time (FCT) over prior approximate PIFO schemes. To the best of our knowledge, Scale-up PIFO is the first
programmable scheduling framework reaching 1.6 Tbps by interleaving across multiple PIFO queues. Trie-Structure-Guided Compression, Allocation, and Mapping for Storage-Efficient IPv6
Lookup Pipelines Abstract: The rapid growth of IPv6 forwarding information bases
(FIBs) strains high-speed routers. While trie-based algorithmic longest-prefix matching (ALPM) pipelines
are widely deployed, existing designs emphasize trie compression but neglect pipeline memory utilization,
limiting scalability under long IPv6 prefixes and imbalanced distributions. We present SCAMP-Trie, a
trie-structure-guided approach that jointly addresses trie compression, node mapping, and pipeline memory
allocation for storage-efficient IPv6 lookup. We propose a trie-based pipelined lookup model (TPLM) that
captures the coupling among these dimensions through a unified storage efficiency metric. Leveraging the
observation that nodes farther from leaf nodes are less frequent, we introduce an inverse-distance-based
mapping principle, realized via a warning-line-based dynamic mapping algorithm and a metaheuristic search
framework. To support flexible mapping while preserving compression, we codesign node structures including
flexible child indexing, sub-trie next-hop compression, and half-size node storage. Evaluated on 36
real-world FIBs across four network scenarios, SCAMP-Trie improves average storage utilization by 4.0X and
prefix capacity by 3.0~67.3X under the same memory budget. An FPGA prototype achieves 768 Gbps line-rate
forwarding for 256-byte packets with a 240k-entry FIB, using only 41% of on-chip memory and 1% of logic. Capybara:
Dynamic Load Balancing with Microsecond-Scale TCP Migration Abstract: Layer-4 load balancers are a popular solution to high
tail latencies but perform poorly under unpredictable skewed workloads because they statically assign
connections to servers. We present Capybara, a new load balancer architecture that enables dynamic
rebalancing of established connections. Capybara divides load balancing responsibility into a fast L4 load
balancer, a host-switch co-designed connection migration protocol, and a transport interface for
application-level connection state migration. Capybara leverages two trends - programmable switches and
kernel-bypass - to efficiently implement connection migration without disruption, while maintaining
transparency to clients. Under realistic workloads, Capybara achieves up to 149× lower tail latency
and more than 2× higher throughput for scale-out services compared to state-of-the-art load balancing
approaches. | Research Session 16: Satellite & Non-Terrestrial Networks Session Chair: Nitinder Mohan CommSAR:
Enabling Bidirectional Communication in SAR Imaging Satellites via Shared Waveform Abstract: Low Earth Orbit (LEO) Synthetic Aperture Radar (SAR)
satellites conventionally rely on dedicated communication links, which impose prohibitive hardware,
spectrum, and power overhead as satellite constellations scale. This paper presents CommSAR, a novel
system that reuses existing SAR imaging waveforms to enable bidirectional communication without modifying
satellite hardware or compromising imaging performance. For the downlink, data are embedded by modulating
the starting frequency offset of the imaging waveform, preserving the waveform structure and imaging
quality. For the uplink, we propose a compact, low-cost programmable metasurface to replace conventional
large, expensive antennas, significantly lowering the barrier for dense ground station deployment. To
handle extreme satellite dynamics, we employ an opposite-slope waveform as a pilot to compensate for
mobility-induced effects. We implement a ground station prototype of CommSAR and validate its performance
using an in-orbit commercial SAR satellite and a UAV SAR platform. Experimental results show that CommSAR
preserves imaging performance without degradation while achieving downlink and uplink data rates of up to
105 kbps and 112 kbps, respectively, significantly outperforming the state of the art and demonstrating
utility-grade performance. Planet-Scale IoT Connectivity via LEO Satellites Abstract: Direct-to-LEO Satellite (DtS) is widely touted as the
path to global IoT connectivity, yet its real-world performance remains opaque. We present the first
large-scale, in-the-wild measurement of DtS using one of the world's largest operational satellite IoT
networks. Our findings overturn a popular belief: DtS capacity is not the pressing issue. Instead, DtS
today is held back by low throughput, long-tail latency, and poor energy sustainability—problems that
fundamentally limit practical adoption. We pinpoint the architectural and protocol-level causes behind
these bottlenecks, revealing systemic inefficiencies across today's DtS designs. Guided by these
insights, we redesign the DtS protocol with three drop-in enhancements: a NACK-driven reliability strategy
that unlocks higher throughput, a flow-control mechanism that trims long-tail delays, and a fine-grained
sleep management that cuts wasted energy. We validate the redesigned protocol through both testbed
experiments and live production deployments, demonstrating 2.1× higher throughput, 52% fewer
long-tail latencies, and 38% energy reduction. Dissecting
the StarLink: Characterizing Queuing and Flow Dynamics in the Starlink Network Abstract: Starlink has become the largest commercial LEO
satellite network, yet little is known about its internal queue management and bandwidth allocation
mechanisms. Prior measurement studies have documented performance variations but lack the granularity to
explain the underlying causes. We present the first microscopic characterization of Starlink's
transmission behavior, using controlled measurements from multiple terminals to capture per-packet
dynamics at microsecond precision. Our analysis uncovers several previously undocumented mechanisms.
Starlink employs head-drop queuing rather than tail-drop, with capacities of approximately 1500 and 4000
packets on downlink and uplink, respectively. Bandwidth allocation is demand-driven, starting from a
baseline of 100/30 Mbps on the downlink and uplink that ramps up by 3.4×/2× over 400 ms when
flows sustain queue pressure. Active queue management aggressively induces packet loss to control queue
occupancy, especially on the uplink. These mechanisms reset every 15 seconds during Starlink's
reconfiguration cycle. We also find flow-level queuing that isolates latency between concurrent flows
while coupling their loss on the downlink. These findings reveal that Starlink's queue management
creates fundamentally different operating conditions than terrestrial networks. Achieving
Efficient Storage and Communication via Collaboration Abstract: Earth observation (EO) constellations operated by
organizations such as Planet, Google, and Amazon generate hundreds of terabytes of imagery every day.
However, limited downlink bandwidth prevents immediate data transmission, forcing satellites to store
large volumes of imagery onboard and often overwrite valuable data before it can be downlinked. Existing
EO pipelines treat each capture independently and fail to exploit the substantial redundancy naturally
present in EO constellations. In practice, two major redundancies dominate: (i) temporal stability, where
consecutive images of the same area change minimally over time, and (ii) spatial overlap, where
neighboring satellites capture largely identical ground regions. To address these inefficiencies, we
present CoOrbit, a collaborative EO system that conserves onboard storage by retaining only changed and
non-overlapping regions. CoOrbit combines lightweight onboard embedding differencing, TLE-based overlap
inference, and adaptive reference embedding planning. We further extend CoOrbit with an application-driven
design, allowing satellites to downlink only application-relevant tiles for even greater efficiency.
Evaluations on satellite-grade GPUs and imagery demonstrate that CoOrbit achieves over 108.6×
reduction in storage cost and 41.6× reduction in communication size compared to existing EO
pipelines. Our evaluation also shows an additional order-of-magnitude reduction when the wildfire-driven
design is applied. |
| 10:10 am – 11:35 am | |
|---|---|
| Track A | Track B |
Research Session 17: Congestion, Rate & Schedule Control Session Chair: Ayush Mishra Improving
Evaluation of Heterogenous Congestion Control Algorithm Interactions Abstract: A critical part of new congestion control algorithm
(CCA) proposals is an evaluation that a new CCA will reasonably share with already widely-deployed CCAs.
However, the methodology for this evaluation is both inconsistent and inefficient due to the complexity of
inter-CCA interactions under highly diverse network settings. We address these challenges by developing
new metrics for evaluating fairness, developing an algorithm for determining when experiments converge,
and applying this methodology to automated evaluation tool Mahak. In addition, we present HarmGen, a new
tool that can efficiently explore a large search space using a genetic algorithm, to find network settings
and workloads where there are poor interactions between heterogeneous CCAs. We show that with an identical
budget of 300 experiments, HarmGen outperforms hill climbing and random search, and finds high harm values
similar to a parameter sweep of 3500 experiments. With Mahak and HarmGen, we identify trends in BBR's
evolution as well as issues with new L4S deployments. Forewarned
is Forearmed: A Responsive Congestion Control with Non-intrusive Uplink Dynamics Capture Abstract: The cellular uplink is increasingly important for
modern applications but poses significant challenges to congestion control algorithms (CCAs), due to the
highly dynamic conditions and complex operations. Existing CCA paradigms, mainly for downloading data, are
unable to react promptly to uplink fluctuations because they rely on ACKs to indicate congestion,
introducing inevitable control loop latency. Furthermore, the cost associated with modifications to both
the sender and receiver cannot be overlooked. We observe a fundamental opportunity in uplink scenarios:
the sender's proximity to the wireless-side allows for fast and accurate control without relying on
ACK-based feedback, and requires no modifications to either the receiver-side or the hardware layer. In
this paper, we propose Aether, mainly consisting of: (1) a monitor deployed on the driver-layer that
captures uplink dynamics, by leveraging our key finding that driver buffer dynamics serve as an indicator
of uplink congestion; (2) a bottleneck detector that activates Aether when the uplink becomes the
bottleneck; (3) a rate controller that steers transmission toward uplink capacity. We implement Aether on
commercial devices and develop a trace-driven emulator for testing Aether. Extensive evaluations
demonstrate that Aether outperforms state-of-the-art schemes, improving average throughput by 9.28% to
234.11% while consistently reducing latency by 5.34% to 56.94%. Queueless
and Dropless Rate Control Abstract: Modern Internet traffic is increasingly dominated by
interactive video applications (e.g. cloud gaming, conferencing, etc) that require high throughput,
extremely low delay, and near-zero drop rates. Meeting these requirements is inherently challenging for
such applications because video encoders often need to overshoot the target bitrates, causing transient
traffic bursts. These bursts lead to inevitable delays and drops on traditional Internet bottlenecks with
fixed capacities and finite physical queues. However, we observe that modern Internet bottlenecks are
often artificial, where ISPs intentionally limit user's traffic to subscribed rates. Our work exploits
the flexibility afforded in these artificial bottlenecks to achieve zero queuing and drops for interactive
applications. Specifically, we make a case for using traffic policers (implemented as token bucket
filters) at the ISPs to enforce desired rate limits on an average. Policers can absorb traffic bursts
without any queuing, but incur packet drops. Our system, QLDL, avoids packet drops by augmenting the
policer and the endpoints with a light-weight explicit rate control mechanism. Our prototype evaluation
using WebRTC applications shows how QLDL thus achieves zero queuing and drops, thereby improving
interactive applications' QoE on all fronts: 2× higher bitrate, 2 – 3× lower frame delays,
and 20× lower playback freezes, when compared to state-of-the-art baselines. Credit-Guided Congestion Control on Wafer-Scale On-Chip Networks for Molecular
Dynamics Abstract: Molecular dynamics (MD) is a cornerstone of scientific
computing, but strong scaling often collapses at high parallelism because communication is bursty and
highly sensitive to tail latency. MD advances by repeating a fixed timestep loop (one iteration of force
computation and state update), and performance is largely determined by how quickly timesteps complete. A
key reason is that each timestep contains short, synchronized communication phases, followed by a global
dependency before the next timestep. Wafer-scale chips (WSCs) offer cycle-level latency and high on-chip
bandwidth, yet their 2D mesh fabrics can still suffer burst-induced queue buildup; existing wavelet
scheduling relies on a static stride that either over-injects (triggering credit backpressure) or
over-throttles (wasting bandwidth) as conditions evolve. We present WaveCC, a credit-guided runtime that
dynamically adapts wavelet injection to instantaneous fabric pressure. WaveCC leverages router credits—the
native backpressure signal in lossless WSC fabrics—without modifying router microarchitecture. At coarse
granularity, WaveCC uses phase-level credit statistics to adapt a global stride at phase boundaries; at
fine granularity, it uses credit gradients to shape per-PE flit injection within burst windows. Across
microbenchmarks and trace-driven evaluations, WaveCC can significantly reduce average and tail
communication completion time and improves timestep throughput. Harvest:
Adaptive Photonic Switching Schedules for Collective Communication in Scale-up Domains Abstract: As chip-to-chip silicon photonics gain traction for
their bandwidth and energy efficiency, their circuit-switched nature raises a fundamental question for
collective communication: when and how should the interconnect be reconfigured to realize these benefits?
Establishing direct optical paths can reduce congestion and propagation delay; however, each
reconfiguration incurs non-negligible overhead, making naive per-step reconfiguration impractical. We
present Harvest, a systematic approach for synthesizing topology reconfiguration schedules that minimize
collective completion time in photonic interconnects. Given a collective communication algorithm and its
fixed communication schedule, Harvest determines how the interconnect should evolve over the course of the
collective, explicitly balancing reconfiguration delay against congestion and propagation delay. We reduce
the synthesis problem into a dynamic program with an underlying topology optimization subproblem and show
that the approach applies to arbitrary collective communication algorithms. Furthermore, we exploit the
algorithmic structure of a well-known AllReduce algorithm (Recursive Doubling) to synthesize optimal
reconfiguration schedules without using any optimizers. By parameterizing the formulation using
reconfiguration delay, Harvest naturally adapts to various photonic technologies. Using packet-level and
flow-level evaluations, as well as hardware emulation on commercial GPUs, we show that the schedules
synthesized by Harvest significantly reduce collective completion time across multiple collective
algorithms compared to static interconnects and reconfigure-every-step baselines. | Research Session 18: Learning-Based & Data-Driven Network Systems Session Chair: Hong Xu Nüwa:
A Generative Control Plane for AI Network Simulation Abstract: Network simulation plays a critical role in improving
the efficiency of large-scale AI clusters for design validation, parameter tuning, and protocol
development. However, high-fidelity network simulation becomes prohibitively slow at scale, especially
when running large batches of experiments on topologies with tens or hundreds of thousands of
accelerators. We observe that a key bottleneck comes from the control plane. Existing network simulators
typically compute routes and install forwarding tables at initialization, which can consume hundreds of GB
of memory before packet-event execution begins and limit overall simulation throughput. In this paper, we
present Nüwa, which views routing as a compilation problem, it leverages the hierarchical and
symmetric structure common in AI fabrics and compiles a declarative topology description together with
routing policies into compact forwarding artifacts that are fast to generate and efficient to look up.
Evaluations show that Nüwa can reduce simulation initialization time from hours to only 25 seconds
for a 65,536-GPU cluster. For end-to-end simulation time, Nüwa takes only 20% of that required by
existing approaches in a 40K+ GPU cluster, and Nüwa can scale to a 221,184-GPU cluster. EMA:
Efficient Model Adaptation for Learning-based Systems Abstract: Machine learning (ML) is increasingly applied to
optimize system performance in tasks such as resource management and network simulation. Unlike
traditional ML tasks (e.g., image classification), networked systems often operate in heterogeneous,
long-running, and dynamic environment states, where input conditions (e.g., network loads) and operational
objectives can shift over time and across settings. Existing learning-based systems offer little support
for adaptation, resulting in costly model training, extensive data collection, degraded system
performance, and slow responsiveness. This paper presents EMA, the first model adaptation system
supporting learning-based systems to adapt to evolving environments with minimal operational overhead. EMA
takes a system-driven, data-centric approach that accommodates diverse system and model designs while
addressing two key deployment challenges. First, it reduces expensive model training by introducing state
transformers that align the input state of a new environment with previously similar states, allowing
models to warm-start adaptation. Second, it addresses the often-overlooked yet costly process of data
labeling—collecting ground truth for exploring and training on various system decisions—by prioritizing
labeling high-utility data while balancing the tradeoff between training and labeling cost. Evaluations on
seven representative learning-based systems show that EMA reduces adaptation costs (e.g., GPU training
hours) by 14.9–42.4% while improving system performance (e.g., network throughput) by 6.9–31.3%. RepLLM:
Toward Automatically Reproducing Network Research Results Abstract: Result reproduction of computer networking research is
challenging as the scarcity of open-source implementations and the complexity of heterogeneous system
architectures. Even though Large Language Models have demonstrated potential in code generation, existing
code generation frameworks often fail to address the long-context constraints and intricate logical
dependencies, which are vital in reproducing network systems from academic papers. Thus, we introduce
RepLLM, an end-to-end multi-agent framework designed to automate code reproduction from paper content.
RepLLM features a collaborative architecture comprising four specialized agents—Content Parsing,
Architecture Design, Code Generation, and Audit & Repair, which are coordinated through Shared Memory
mechanism to ensure global context consistency. With the enhancement of Structured Chain-of-Thought LLM
reasoning and a sandbox-isolated static-dynamic debugging methodology, our framework effectively resolves
semantic discrepancies and runtime errors, thereby improving reliable reproductions. Extensive evaluations
on representative papers in top conferences demonstrate that RepLLM outperforms state-of-the-art
system-level LLM frameworks in generating compile-ready and logically correct systems. Our results show
that, with the aid of RepLLM, we can reproduce 95% of the original benchmarks within approximately two
hours while reducing token consumption by up to 10% compared with state-of-the-art baselines. Artic:
AI-oriented Real-time Communication for MLLM Video Assistant Abstract: AI Video Assistants are emerging as a new paradigm for
Real-time Communication (RTC), where one peer is a Multimodal Large Language Model (MLLM) deployed in the
cloud. This makes interaction between humans and AI more intuitive, akin to chatting with a real person.
However, a fundamental mismatch exists between current RTC frameworks and AI Video Assistants, stemming
from the drastic shift in Quality of Experience (QoE) and more challenging networks. Measurements on our
production prototype also confirm that current RTC fails, causing latency spikes and accuracy drops. To
address these challenges, we propose Artic, an AI-oriented RTC framework for MLLM Video Assistants,
exploring the shift from "humans watching video" to "AI understanding video."
Specifically, Artic proposes: (1) Response Capability-aware Adaptive Bitrate, which utilizes MLLM accuracy
saturation to proactively cap bitrate, reserving bandwidth headroom to absorb future fluctuations for
latency reduction; (2) Zero-overhead Context-aware Streaming, which allocates limited bitrate to regions
most important for the response, maintaining accuracy even under ultra-low bitrates; and (3) Degraded
Video Understanding Benchmark, the first benchmark evaluating how RTC-induced video degradation affects
MLLM accuracy. Prototype experiments using real-world uplink traces show that compared with existing
methods, Artic significantly improves accuracy by 15.12% and reduces latency by 135.31 ms. Critical
Path Guided Decision Making with CALLIGATOR Abstract: Modern web applications are typically implemented by
many independent microservices. Seeing into such a distributed system and predicting how component changes
propagate across the system is essential for informed decision-making. Unfortunately, existing tools
provide only partial support for such analysis in microservice systems. Calligator is a toolkit that
addresses this limitation by introducing a new approach to analyzing distributed systems that uses
critical path analysis to make informed decisions about design, planning, and provisioning. This paper
makes two key contributions. (Methodology) Calligator infers explicit execution dependencies from
distributed traces and uses them to compute accurate critical paths and key metrics. Pairing this
dependency graph with these metrics enables a retiming-based "what-if" predictor and tail-aware
(e.g., p99) bottleneck analysis, improving latency prediction accuracy by 81.7% over the state of the art.
(Applications) Using these techniques, Calligator tunes hedging policies, identifies true bottlenecks in
production applications at Google, and allocates resources where they most reduce end-to-end latency,
achieving up to 94.7% lower p99 latency at equal resources for DeathStarBench. |
| 11:45 am – 12:55 pm | |
|---|---|
| Track A | Track B |
Experience Session 5: WAN, Configuration & Verification Session Chair: Ranjita Bhagwan GGN:
Experiences in Designing and Deploying the Next-Generation Google Global Network Abstract: Cloud and AI/ML workloads are posing unprecedented new
requirements on the wide-area network: it must combine strict availability, massive growth, and feature
agility. It became increasingly clear that traditional WAN designs were ill-equipped to adapt to these
requirements. We present Google's Global Network (GGN), a major architectural redesign of our WAN that
evolves B2 and B4 into a single, modular, and highly available software-defined network. The architecture
is designed around three pillars: (1) A modular design of functional domains with well-defined APIs; (2) a
physically sharded and regionalized core for fault isolation and horizontal scaling; (3) a vendor-agnostic
hardware strategy based on open standards. We share the multi-year deployment journey of GGN, including a
safe, host-steered migration strategy, and demonstrate its ability to improve network availability and
reaction time to failures, setting a foundation for a planet-scale modern WAN. Achieving
Network Efficiency Through Service Collaborative Capacity Sharing and Enforcement Abstract: Meta's rapid expansion in users, business
operations, and AI workloads is straining our backbone network, while physical constraints—such as fiber,
space, and power—limit the speed of capacity growth. To address these challenges, we present a
service-aware network capacity planning suite that systematically improves network efficiency with a
service collaboration approach. We propose the "safe capacity" abstraction which enables
services to incorporate current and projected network conditions into their compute and storage allocation
decisions. We introduce a hose-carving method that efficiently translates service-level traffic demands
into detailed traffic matrices, allowing for more precise bandwidth allocation. To promote responsible
network usage, we design a network rate card which attributes network consumption to individual services,
incentivizing optimization and resource trade-offs. Additionally, new enforcement features at the end-host
layer dynamically adjust resource allocations and traffic flows at runtime to maximize utilization. This
paper is the first to detail a collaborative, service-aware approach to backbone network efficiency at
Meta scale. Based on years of operational experience, we share practical insights and highlight new
directions for research in network efficiency. Verifying
Non-Deterministic Convergence on a Global Production WAN Abstract: This paper presents our experience deploying TianYan
on Alibaba Cloud's global production WAN, which is, to the best of our knowledge, the first system for
verifying non-deterministic convergence on a global production WAN. In daily operation, we rely on
simulation-based configuration verifiers that assume a single converged data plane to ensure reliability
and performance. However, non-deterministic convergence—where a configuration yields different converged
data planes—undermines verification accuracy and has caused a production incident, motivating the need to
analyze non-deterministic convergence itself. At scale, this is challenging because the analysis space
grows exponentially with the number of routers. TianYan addresses this challenge with a key insight: by
leveraging routing similarity among routers within the same group—a common fault-tolerance practice—it
reduces exponential complexity from the number of routers to the number of groups, enabling efficient
convergence analysis. Over a year of deployment, TianYan identified non-deterministic convergence in ~2%
of all prefixes, exposed unnoticed design flaws, and improved simulation-based verification accuracy
through integration. We share representative cases and evaluation results from our production WAN,
distilling key operational lessons and practical guidelines for managing nondeterminism at scale. AIDA:
Accelerating Root Cause Analysis for Multi-Vendor Device Failures with LLM-Powered
Reasoning Abstract: Root cause analysis (RCA) of network device failures
is critical to cloud reliability. While monitoring can identify which device has failed, diagnosing why
remains a slow, manual process, increasing the risk of recurring failures and cascading service
disruptions. Existing automated methods are inadequate: traditional methods lack precision, while prior
machine learning (ML) and large language model (LLM) approaches are often too coarse-grained, require
heavy manual configuration, or fail to produce verifiable reasoning essential for operator trust. This
paper presents AIDA, the first system to deliver automated, fine-grained RCA of network device failures,
deployed at scale in Alibaba Cloud's production network. AIDA's contributions include: (1)
fine-tuning an LLM with reinforcement learning to distill expert logic into interpretable reasoning
chains; (2) synthesizing these chains into an evolving knowledge graph (KG) to support retrieval-augmented
generation (RAG); and (3) employing RAG-driven multi-step inference wherein the LLM is sequentially guided
by the KG to construct robust, verifiable reasoning. Deployed for over a year, AIDA has achieved 95.4%
precision with interpretable output and reduced the median RCA time from 72.6 hours to 1.6 minutes.
Notably, it curtails the 90th-percentile diagnosis latency from 329.9 hours to 19.4 hours. | Experience Session 6: Deployment Experiences: Security, Transport & Core Session Chair: Ajay Mahimkar Comprehensive Revocation Checking at Scale: the Deployment of CRLite in Mozilla
Firefox Abstract: This paper describes the multi-year effort undertaken
by Mozilla to incorporate and deploy CRLite, a TLS certificate revocation checking system, in the Firefox
browser. With the deprecation of the Online Certificate Status Protocol (OCSP) by Let's Encrypt and
others, CRLite is now the only broadly deployed mechanism capable of checking the revocation status of
every TLS certificate. The successful seven-year evolution of CRLite from a research prototype to a widely
used tool required improvements in the original data structures (now using partitioned Ribbon filters),
changes in Certificate Authority revocation practices, and correctly synchronizing with Certificate
Transparency logs to eliminate false positives. Using data from Firefox's opt-in telemetry, we report
that CRLite achieves an effective revocation coverage of 87.8% while maintaining moderate bandwidth costs,
even during real revocation events like the November 2025 Microsoft incident. Through simulations, we also
examine the potential impacts of shorter certificate lifetimes and hypothetical mass revocations on
CRLite. CRLite demonstrates that low-latency, private, comprehensive certificate revocation checking is
possible using moderate bandwidth. Rethinking
Transparent TCP Replacement: Practical Lessons from SMC-R in the Cloud Abstract: Transparent TCP acceleration has been a subject of
extensive academic research for years, aiming to bypass kernel overhead without modifying legacy
applications. Prior work, however, largely emphasizes performance under idealized settings and provides
limited discussion of how costs and gains manifest in real production environments. Over the past four
years, we have deployed and evaluated SMC-R within Alibaba Cloud to accelerate general cloud workloads.
Our experience reveals that transparent TCP replacement is far from "drop-in" in practice. The
integration barriers and disruptions to the existing ecosystem incur substantial hidden costs.
Furthermore, in many real-world scenarios, the Linux TCP stack is not the dominant performance bottleneck;
instead, suboptimal application-layer behaviors and system configurations often exert a more decisive
influence on end-to-end gains. These engineering realities explain why transparent TCP replacement remains
active in academia but sees limited adoption in production. This paper systematically summarizes the
fundamental hurdles we encountered and traces them to their root causes, aiming to provide the community
with a more grounded perspective on the costs and benefits of transparent acceleration. Planogram:
A Multi-dimensional Physical Location Planning System for DC Networks Abstract: Meta's data centers underpin a vast array of
Internet services and have faced unprecedented demand due to the rapid expansion of AI workloads. The
traditional approach of building standardized data centers is increasingly challenged by the exponential
growth in required capacity that is now sourced in a variety of non-standard physical environments and
data center designs. This shift introduces a complex challenge: how to rapidly and repeatably design
custom data center networks that balance multiple, often conflicting, objectives across diverse
engineering disciplines. In response, we present Planogram, a physical location mapping framework for DC
networking. Planogram automates the traditionally manual and time-consuming process of mapping logical
network entities onto physical data center floor plans. By ingesting a logical network, a DC stencil of
physical constraints, and a set of design objectives, Planogram leverages Integer Linear Programming and
Reinforcement Learning to produce fully mapped floor plans. Our production experience with Planogram,
having already designed multiple datacenter regions, has shown substantial reduction in the time to
design, while improving design quality and consistency across network segments and regions. Gryphon:
Scaling Hyperscale Multi-Tenant Gateways Beyond the Petabit-Era via DPU-Augmented Hierarchical
Co-Offloading Abstract: At ByteDance, cloud gateway clusters orchestrate
petabit-scale aggregate traffic. Traditional ASIC-only gateways fail to meet these escalating demands due
to severe on-chip resource constraints and limited programmable flexibility, while pure software solutions
or alternatives like disaggregated SmartNICs struggle to match terabit-scale line-rate throughput. To
bridge this gap, we present Gryphon, a hyperscale cloud gateway built on a hybrid architecture that
integrates DPUs directly into the switching ASIC's forwarding path. This design resolves the
fundamental tension between capacity and speed, expanding table scale by up to 1000× and augmenting
programmability, while sustaining 1.6 Tbps line-rate throughput at a cost of only ~8 μs in additional
average latency. To manage this hardware heterogeneity, we introduce Hierarchical Co-Offloading (HLCO) in
the data plane, achieving >99.9% fast path hit rate, while retaining software fallback for complex
operations. In the control plane, we develop an abstraction layer (P4Bridge) that decouples hardware
specifics from policy configuration. Gryphon has been operating at production scale for over a year,
deployed on hundreds of nodes across multiple Availability Zones. We also share production measurements
and operational experiences that serve as the first hyperscale-proven guidelines for next-generation
DPU-augmented cloud gateways. |