Programmability of Wireless Networks
Presented by: Ilenia Tinnirello, Giuseppe Bianchi, Francesco Gringoli, Xavier Pérez Costa
Friday, August 17, 2012 (half day)
Helsinki, Finland
Room: #21
Tutorial Requirements
Attendants must bring their own laptops to connect to the WMP boards. A Java environment is required to run the graphical tools for building the XFSMs.
Technical Program
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Importance of programmability of wireless networks for R&D
Related approaches
Limitations of current State of the Art
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Architecture description
Differences to state of the art
New programmability potential
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WMP Machine language
Finite State Machine builder (XFSM)
Programmability illustration examples: standard DCF and minor variations
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Insight on a packet jammer
Implementation of new MACs on commodity hardware
Time-Division-Multiple-Access
Multi-Channel MAC
Piggybacking (e.g., for TCP speed up)
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Participants implement their own MAC
Behaviors of designed MAC verified by tracing throughputs from the userspace
More tests capturing and displaying signals with USRP hardware
Motivation
Wireless networks importance for the future Internet is raising at a fast pace as mobile devices increasingly become its entry point. However, today wireless networks are unable to rapidly adapt to evolving contexts and service needs due to their rigid architectural design.
Programmability of wireless networks is a promising key solution that could boost innovation and reduce the cost of future network upgrades. Operators, manufacturers, network designers, emerging third-party solution developers, and even spontaneous end users, would be able to easily and rapidly optimize and upgrade the wireless network operation, quickly prototype and test their new protocols, and adapt the wireless access operation to emerging scenarios or service needs.
This tutorial will present, demonstrate and provide a hands-on experience on the concept of Wireless MAC Processors (WMP) being developed at the FP7 European project FLAVIA. WMPs are programmable devices which i) provides a set of stateless Medium Access Control commands, and ii) embed a MAC protocol engine in charge of executing a finite state machine able to exploit and compose the sequence of commands forming a desired protocol.
Wireless MAC processor commands can be considered analogous to the instruction set of an ordinary CPU. They are meant to implement elementary actions, namely MAC operations such as transmit a frame, set timers, etc, which may be then executed in the appropriate sequence and/or under the occurrence of specific events and conditions mandated by a protocol logic. Based on the WMP, a MAC protocol engine can be defined in charge of executing a user-developed software program implementing a desired MAC protocol operation in the form of an extended finite state machine. Flexibility and ease of programmability is thus a consequence of the clear architecture-level decoupling made between what the device is able to do (the pre-installed MAC commands), and what it is instructed - at run time - to do (the injected state machine).
The WMP approach planned to be presented and demonstrated in this tutorial represents a major R&D leap from related work in this area since, unlike other works which rely on dedicated DSPs or programmable hardware platforms, we will experimentally prove: i) the feasibility of the wireless MAC processor concept over ultra-cheap commodity WLAN hardware cards (e.g., commercial Broadcom AirForce54G off-the-shelf chipset), ii) the possibility of programming time-critical medium access operations and event-triggered PHY configurations without knowing any detail about the internal design of the hardware platform.
The MAC protocol Engine implementation developed in the European project FLAVIA will be openly released to the research community around June, together with a graphical tool for defining MAC state machines. Therefore, SIGCOMM 2012 would be a perfect venue to explain, demonstrate and provide the basics to researchers interested in exploiting these new programmability capabilities for their own R&D activities.
